[lowrisc-dev] Problem running a debug session on FPGA
iwali at nebrija.es
Thu May 31 12:58:43 BST 2018
Thanks for your reply.
As suggested, I updated my local GLIP repository to the current master and rebuild the glip and opensocdebug software.
But still facing the same problem.
Do you have any clues, what's going wrong?
From: lowrisc-dev-bounces at lists.lowrisc.org <lowrisc-dev-bounces at lists.lowrisc.org> on behalf of Philipp Wagner <lists at philipp-wagner.com>
Sent: Wednesday, May 30, 2018 5:03:29 PM
To: lowrisc-dev at lists.lowrisc.org
Subject: Re: [lowrisc-dev] Problem running a debug session on FPGA
On 05/30/2018 04:26 PM, Imran Wali wrote:
> I am trying to run a debug session on FPGA as described on http://www.lowrisc.org/docs/debug-v0.3/fpga/.
> After programming the nexys4ddr board with the provided debug enabled FPGA bitstream, following error is encountered while trying to open the debug daemon:
> $ opensocdebugd uart device=/dev/ttyUSB1 speed=12000000
> Open SoC Debug Daemon
> Backend: uart
> opensocdebugd: ../../src/regaccess.c:60: osd_reg_read16: Assertion `packet == 3' failed.
> Aborted (core dumped)
> Could you please identify what's going wrong here.
this looks like a bug in GLIP that we already fixed. Could you try
updating the GLIP code in your lowrisc version to current master and try
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