[lowrisc-dev] Untethered lowRISC FPGA_FULL mode simulation Error
golirev at 163.com
Sat Mar 31 02:30:33 BST 2018
Hi, LowRISC team:
When I do FPGA_FULL mode simulation of your Untethered lowRISC version 0.2 got from Git, I meet a strange simulation scenario showed below.
I found the "mem_nasti.r_ready[0:0]" always be 0, but driver of this wire is 1. The driver is "io_nasti_r_ready" of Rocket. So the Hellworld test will be failed.
But if I use FPGA mode to do the simulation for same Helloworld test, it is successful finished. I have checked the difference of this two simulation modes,
the difference are forcus on DRAM(xilinx mig) ,clock and reset generation which is not the interface the Helloworld test need to access.
I am not sure it is VCS simulator's problem, or I missed something?
Waiting your feedback. Thank you!
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