[lowrisc-dev] dii_package not declared - KC705 build

Dr Jonathan Kimmitt jrrk2 at cam.ac.uk
Tue Jan 30 08:35:41 GMT 2018


Dear Anup,

Due to a lack of compatibility of peripherals and a recent reduction in 
staffing levels on

the project we have not got around to updating the KC705 support for 
several releases.

If you want to have a go at updating the KC705 port, you should proceed 
as follows:

1.    Use meld to compare the toplevel of nexys4_ddr and kc705.

2.    Remove any directories in kc705 that are not in the latest release.

3.    Copy across any changes in source files from nexys4_ddr and kc705, 
except for constraints, mig config, and

obvious differences such a board selection and predefines (specified in 
make_project.tcl).

4.    Identify non matching peripherals such as VGA and keyboard and 
disable them in the toplevel.

5.    Adapt the Ethernet MII interface for the different standard, as 
per the PHY datasheet. Unfortunatey there are

many different options, MII, RMII, SGMII, XGMII and so on.

This issue was asked about before and as a result the kc705_update 
branch was created to capture

some of the obvious differences, as a result you may be able to skip 
some of the above. Also the other people who inquired

may have made progress since then, if you want to look back at the 
mailing list archives for August.

If you want to do the same for Virtex 7 2000T, make a copy of nexys4-ddr 
again and import constraints, mig config and
PHY details from the example designs that come with the board when you 
purchased it. If there are no such designs,
you need to work from the schematics and datasheets. This can be a 
lengthy process, especially when the data is inaccurate.

Regards,
Jonathan

On 30/01/18 06:53, Anup Kini wrote:
> Hi All,
>
> I cloned a fresh copy of ethernet-v0.5 today and tried to build for KC705.
> I get the following errors during the synthesis process.
>
> INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device
> 'xc7k325t'
> ERROR: [Synth 8-1031] dii_package is not declared
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:3]
> ERROR: [Synth 8-1766] cannot open include file consts.vh
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:5]
> ERROR: [Synth 8-1766] cannot open include file dev_map.vh
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:6]
> ERROR: [Synth 8-2841] use of undefined macro ROCKET_MEM_TAG_WIDTH
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:195]
> ERROR: [Synth 8-2841] use of undefined macro ROCKET_PADDR_WIDTH
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:196]
> ERROR: [Synth 8-2841] use of undefined macro ROCKET_MEM_DAT_WIDTH
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:197]
> ERROR: [Synth 8-2841] use of undefined macro ROCKET_IO_TAG_WIDTH
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:509]
> ERROR: [Synth 8-2841] use of undefined macro ROCKET_IO_DAT_WIDTH
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:511]
> INFO: [Synth 8-2350] module chip_top ignored due to previous errors
> [/home/anup/work_sumana/lowrisc-chip-ethernet-v0.5/src/main/verilog/
> chip_top.sv:9]
>
> System Config:
> Ubuntu 16.04
> Vivado 2015.4
> lowrisc branch - ethernet-v0.5
>
> When I change the board to nexys4_ddr, it works fine.
> Kindly let me know how to include the dii_package.
>
>
> Thanks & Regards,
> Anup Kini.




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