[lowrisc-dev] crash course

Dr Jonathan Kimmitt jrrk2 at cam.ac.uk
Mon Apr 9 11:50:50 BST 2018


Dear Secrux,

I can only really refer you to our most recent release at the beginning 
of the year (ethernet-v0.5). The plans for our next release are still 
fluid.

Obviously if you have access to a Digilent Nexys4ddr you can get started 
straight away with our prebuilt images. Once this works you will want to 
go through our build tutorial to gain familiarity. In terms of 
contribution we are looking for:

1.    Any kind of Computer Science research that uses our system and can 
mention it in papers.
2.    Imaginative examples of tag architecture to demonstrate security 
enhancements.
3.    Any hardware performance boosts, or analysis of where performance 
boosts will come from.
4.    Bug fixes and/or software enhancements.
5.    Ports to support other FPGA boards.
6.    Corrections or improvements to documentation or tutorial instructions.
7.    Put your own suggestion here.

Because of the flexibility and low cost of the Digilent platform we are 
not looking to move to a larger platform just now.

On 09/04/18 11:10, secrux at protonmail.com wrote:
> Hi.
>
> Unfortunately there was nobody in the corresponding IRC channel so I think it might be worth to ask it here.
>
> I would like to get an overview about the lowRISC project. I would love to participate in one way or another in order to make the hardware available to the public one day.
>
> Can somebody provide me a crash-course how things are working and which further steps are needed to be done?
>
> Best,
> secrux
>




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