[lowrisc-dev] Re: Debug Taskgroup
asb at lowrisc.org
Tue Dec 26 11:26:19 GMT 2017
On 26 December 2017 at 06:24, kritik bhimani <bhimanikritik at gmail.com> wrote:
> Hi Alex/Stefan, I saw that you both are a part of the debug taskgroup. So
> could you please let me know regarding any activity on Trace feature. I
> wanted to know which features of the debug in previous revisions of lowRISC
> should be ported to work with the latest rocket-chip. As features like MAM
> and System Control Module I don't think are needed any more. Instead I think
> the aim should rather be to extend the existing debug infrastructure in the
> latest rocket-chip to use features from open soc debug like glip, CTM and
> STM and at the same time be compliant with the debug spec.
The debug working group are focusing on finalising the run-control
spec currently so there is no real activity on trace. Sadly the terms
of RISC-V Foundation membership make it impossible to share non-public
information about taskgroup discussions.
> This will also
> help in future to integrate latest rocket-chip into lowRISC. Secondly can an
> issue on the GitHub repo be raised stating all the features that are yet to
> be ported from the previous revisions like trace debug, tag cache and
> related infrastructure.
That's definitely a good idea. As you may have seen from discussion on
the list, Jonathan has recently integrated Ethernet support using open
source IP but this is based on the previous rocket-chip release. Once
the Cambridge team is back in the office in the new year, we'll aim to
enumerate the remaining required work for a lowRISC platform release
using a newer rocket-chip, and as you suggest - outline the tasks
needed to further extend that.
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