[lowrisc-dev] KC705 support

Wei Song wei.song at cl.cam.ac.uk
Tue Aug 22 11:04:49 BST 2017


The 'rts' and 'cts' signals are used for UART hardware flow control 
which is used to support the high baud rate.
Actually I am not the most knowledgable person on this matter.
On our mail list, Jonathan and Stefan have already started to provide 
information regarding UART.
Stefan is the original author for this high speed UART interface, which 
amazed me initially as well.

-Wei


On 22/08/2017 01:14, Armia Salib wrote:
> Hello Wei,
>
> Thank you for your reply. So I am interested in adding this support to V0.3, I can contribut it back when I am done. As I mentioned before, I updated the Makefile. However, I still have minor issues:
>
> - I checked the changes in 'chip_top.sv', and I found two new IOs, 'rts' and 'cts'. I think I need to add them to 'pin_plan.xdc' based on the  information in https://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf P46. Did I miss something?
>
> - Also, will KC705 be able to run on 12000000 UART speed? From https://www.silabs.com/documents/public/data-sheets/CP2103.pdf, I see the the UART-USB bridge support up to 1Mbps. What are the changes needed to support lower rate?
>
> Thank you in advance :).
> Armia
>
> --------------------------------------------
> On Mon, 8/21/17, Wei Song <wei.song at cl.cam.ac.uk> wrote:
>
>   Subject: Re: [lowrisc-dev] KC705 support
>   To: "Armia Salib" <armiasalib at yahoo.com>, "lowrisc-dev" <lowrisc-dev at lists.lowrisc.org>
>   Cc: "Dr Jonathan Kimmitt" <jrrk2 at cam.ac.uk>
>   Date: Monday, August 21, 2017, 9:44 PM
>   
>   Hello Armia,
>   
>   KC705 is only officially supported for
>   untether-v0.2.
>   It is not supported for
>   v0.3/0.4 only because the limited number of
>   users and the limit time available on our
>   end.
>   There are numerous attempts to port
>   lowRISC to KC705/VC707 board in
>   recent
>   years.
>   I believe there must have been
>   several successful ports, however, no one
>   has contribute back yet.
>   The
>   port job is actually straight-forward. It is just not urgent
>   enough
>   for us to actually make it.
>   
>   Would you please file an issue
>   on our GitHub? Therefore we can keep
>   track
>   it and may be have it done some time in the future.
>   Even better, if you would like to port v0.3/0.4
>   to KC705 and contribut
>   it back, we can
>   definitely provide help and guide you for the whole
>   process.
>   
>   To start the port
>   for v0.3, the easier way I think is to modify the
>   Makefile available for the Nexys4-DDR board
>   into one supporting KC705.
>   The major
>   difference for these two boards is the memory controller.
>   
>   I cc.ed Jonathan who is now in
>   charge of the minion/FPGA work for lowRISC.
>   
>   Best regards,
>   Wei
>   
>   
>   On
>   21/08/2017 21:21, Armia Salib wrote:
>   >
>   Hello *,
>   >
>   > We bought
>   KC705 board particularly to build a system that is based on
>   LowRISC V0.3 project. We tried to execute "make
>   bitstream" from
>   "lowrisc-chip/fpga/board/kc705", but it gave the
>   following errors:
>   >
>   >
>   """
>   > ERROR: [Synth
>   8-1031] dii_package is not declared
>   [/home/armia/IntensivateRoot/lowrisc-chip/src/main/verilog/chip_top.sv:3]
>   > ERROR: [Synth 8-1766] cannot open include
>   file consts.vh
>   [/home/armia/IntensivateRoot/lowrisc-chip/src/main/verilog/chip_top.sv:5]
>   > ERROR: [Synth 8-1766] cannot open include
>   file dev_map.vh
>   [/home/armia/IntensivateRoot/lowrisc-chip/src/main/verilog/chip_top.sv:6]
>   > """"
>   >
>   > Is KC705 board
>   supported for LowRISC V0.3 and V0.4? I can change
>   "lowrisc-chip/fpga/board/kc705/Makefile" with the
>   msissing files, however, I am not sure if I will face more
>   surprises later. What are other changes you may expect to
>   support KC705?
>   >
>   >
>   Best regards,
>   > Armia
>   >
>   
>   




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