[lowrisc-dev] device tree

Saket Sinha saket.sinha89 at gmail.com
Fri Mar 4 18:08:54 GMT 2016

Hi James,

First of all, thanks for your support. I spoke with Roy Spliet for my
interest for bringing device tree support on lowrisc kernel for GSOC
participation as a student.

I would like to discuss the idea further with you and Roy on this.

Saket Sinha

On Fri, Mar 4, 2016 at 9:24 PM, Jamey Hicks <jamey.hicks at gmail.com> wrote:
> I've been working on RISC-V system integration with Bluespec and Draper. In
> order to speed up testing, I'm running the kernel in qemu but have
> connected it to peripherals on an FPGA.
>   https://github.com/cambridgehackers/riscv-qemu
> Right now I'm just doing system integration, rather than developing new
> peripherals. My goal was not to have to modify any drivers. I'm using BSV
> to integrate Xilinx IP cores and Connectal to connect the software to the
> hardware.
>    https://github.com/cambridgehackers/connectal/tree/master/tests/spikehw
> I have a UART and the Xilinx AXI Interrupt Controller working and I'm
> debugging a problem with the AXI I2C Controller device driver.
> Without changing the software or BSV, I could connect qemu to bluesim or
> Verilator.
> Looking at qemu, it would be cool if it populated its device models based
> on the device tree, so that one could emulate something that matched the
> hardware.
> I'm thinking about how to derive the hardware from some sort of
> device-tree-ish specification.
> If any of this is helpful to someone working on GSoC or anything else, I
> would be happy to discuss the approach and the code.
> Cheers,
> Jamey Hicks

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