[lowrisc-dev] Integrating more open-source IP for lowRISC on FPGAs (GSoC 2016)

Radhika radhikaghosal at gmail.com
Tue Mar 1 14:08:59 GMT 2016


I'm interested in contributing to lowRISC and being a part of GSoC this
summer. I'm familiar with Verilog and am currently reading up on Chisel,
and am looking to work on an open-source memory controller for lowRISC.

For this project, what sort of order of implementation would you suggest?
Also, would you be able to suggest any relevant resources to go through for
additional information/knowledge?


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