[lowrisc-dev] ERROR: [Synth 8-439] module 'axi_quad_spi_0' not found [/home/rjones/d/lowrisc-chip/src/main/verilog/chip_top.sv:295]

Richard W.M. Jones rjones at redhat.com
Mon Jul 25 19:25:37 BST 2016


Probably an elementary problem, but when compiling the FPGA
demo ("make bitstream") for Nexys 4, I get:

ERROR: [Synth 8-439] module 'axi_quad_spi_0' not found [/home/rjones/d/lowrisc-chip/src/main/verilog/chip_top.sv:295]
ERROR: [Synth 8-285] failed synthesizing module 'chip_top' [/home/rjones/d/lowrisc-chip/src/main/verilog/chip_top.sv:6]

axi_quad_spi is a piece of Xilinx IP?  I'm afraid this is where my
knowledge of what's going on gets hazy.

I'm using:

 - Fedora 24 on x86_64 host
 - Vivado v2016.2 (64 bit of course)
 - untether-v0.2 (not for any particular reason, I could try 0.3)

Everything else up to this point has worked pretty much fine.

Rich.

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