[lowrisc-dev] PCR Interrupts
francesco.vgg at gmail.com
Sat Jul 23 04:18:53 BST 2016
Thank you guys! I got it.
Also, Does this current untethered version support Linux kernel modules? I
am trying to use modules with "insmod" but it states that relocation is not
supported. Is there any way to install modules in this version?
On Thu, Jul 21, 2016 at 1:40 PM Alex Bradbury <asb at asbradbury.org> wrote:
> On 21 July 2016 at 18:32, Wei Song <ws327 at cam.ac.uk> wrote:
> > Hello Francesco,
> > The interrupt sources are simply or-reduced and connected to the irq pin
> > each core.
> > There is an enable register (per core in PCR) which can be used to
> > certain interrupt source.
> > If a core decide to enable a source and response, it can read the pending
> > register in pcr (if level triggered) or poll actual devices to find out
> > outstanding interrupts.
> > If level-triggered, core needs to handle interrupt directly with the
> > device until the device withdraw its interrupt.
> > I would say it is better to use a level triggered interrupt.
> > Edge triggered interrupt may need special hardware treatment.
> > We will add a proper interrupt controller in the next code release.
> To clarify, this interrupt controller will be the PLIC described in
> the 1.9 draft privileged spec
> The slides+video from Krste's talk at the 4th RISC-V Workshop last
> week will hopefully go online soon, which outlines the principles
> behind this interrupt controller. For now you'll have to make do with
> the spec and my notes
> from the presentation. Krste describes the concept of an interrupt
> "gateway" that abstracts away differences between edge vs level
> triggered interrupts as they enter the PLIC. This is described in
> section 7.4 of the 1.9 RISC-V privileged spec.
| Francesco Viggiano, Columbia University, Staff associate researcher at
Computer Science Building |
| Phone: +1 646-9829-535, Skype ID: francesco.vgg |
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