[lowrisc-dev] PCR Interrupts
ws327 at cam.ac.uk
Thu Jul 21 18:32:27 BST 2016
The interrupt sources are simply or-reduced and connected to the irq pin
of each core.
There is an enable register (per core in PCR) which can be used to
disable certain interrupt source.
If a core decide to enable a source and response, it can read the
pending register in pcr (if level triggered) or poll actual devices to
find out the outstanding interrupts.
If level-triggered, core needs to handle interrupt directly with the
source device until the device withdraw its interrupt.
I would say it is better to use a level triggered interrupt.
Edge triggered interrupt may need special hardware treatment.
We will add a proper interrupt controller in the next code release.
On 21/07/2016 16:46, Francesco Viggiano wrote:
> Hello guys,
> I'm using the Unthetered version of the lowrisc-chip. Are the interrupt
> sources going to the PCR edge-sensitive or level-sensitive? Will the actual
> interrupt be sampled and reimain pending even if the signal goes down? Or
> it needs to stay high until the CPU resolves it?
> Thank you for your support,
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