[lowrisc-dev] Address bit width
ws327 at cam.ac.uk
Thu Jul 14 18:19:10 BST 2016
I did not find this pALen variable in current Configs.scala.
However, even you managed to change this, it would not work.
The current Rocket chip uses Sv39 address model by default, that means
39-bit physical address using 3-level page tables.
I think it is much more possible to expand the physical address width to
39 and work out-straight.
More than 39, it will need some significant changes.
On 14/07/2016 13:06, Francesco Viggiano wrote:
> Hello guys,
> Do you support 64 bit addresses in order to have a total memory space
> larger then 4 Gb? I see there is "pALen" variable in Configs.scala, if I
> change that value to 64 the compilation get broken. Do I need to set other
> parameters to accomplish that purpose?
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