[lowrisc-dev] Coding guidelines

Wei Song ws327 at cam.ac.uk
Mon Jul 11 13:42:45 BST 2016


Hello Gary,

We do not have a guideline right now.
The one from NetFPGA looks very sensible but I need to have a second read.
Also this one regulates only the use of Verilog features while missing 
SystemVerilog ones.
Most of the time, the using of SystemVerilog features is the actual pain 
in pushing code through various EDA tools.

Yeah, this is a good idea and I would strongly suggest you guys starting 
following the NetFPGA guidelines.
We would provide a lowRISC one when time allows.

Best regards,
Wei

On 11/07/2016 08:26, Gary Guo wrote:
> Hi All,
>
> I wonder if there is already a coding guideline. I think it is necessary to have one to make sure contributed codes are of the same format. If we don't have one currently, I suggest that we can use or derive from existing ones, such as https://github.com/NetFPGA/netfpga/wiki/VerilogCodingGuidelines
>
> Best,
> Gary
>   		 	   		




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