July 2021 - netsurf-commits - listmaster.pepperfish.net

netsurf: branch chris/ndk32 updated. release/3.10-167-ga7e976b

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/netsurf.git/shortlog/a7e976b3fbc1038408b02... ...commit http://git.netsurf-browser.org/netsurf.git/commit/a7e976b3fbc1038408b024b... ...tree http://git.netsurf-browser.org/netsurf.git/tree/a7e976b3fbc1038408b024b46... The branch, chris/ndk32 has been updated via a7e976b3fbc1038408b024b46dced0205514e109 (commit) from cdf821454ae0328224c037398ac2f41ab4acd163 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=a7e976b3fbc1038408b... commit a7e976b3fbc1038408b024b46dced0205514e109 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: switch to using OS3.2's idea of TimeVal/TimeRequest diff --git a/frontends/amiga/font_cache.c b/frontends/amiga/font_cache.c index b8039d2..cdb26fe 100644 --- a/frontends/amiga/font_cache.c +++ b/frontends/amiga/font_cache.c @@ -101,12 +101,12 @@ static void ami_font_cache_cleanup(struct MinList *ami_font_cache_list) fnode = node->objstruct; GetSysTime((struct timeval *)&curtime); SubTime((struct timeval *)&curtime, (struct timeval *)&fnode->lastused); - if(curtime.Seconds > 300) + if(curtime.tv_secs > 300) { NSLOG(netsurf, INFO, "Freeing %s not used for %d seconds", node->dtz_Node.ln_Name, - curtime.Seconds); + curtime.tv_secs); DelObject(node); } } while((node=nnode)); diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index f04b37b..2df0141 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -120,12 +120,6 @@ /* Renamed structures */ #define AnchorPathOld AnchorPath -/* TimeVal/TimeRequest */ -#define Seconds tv_secs -#define Microseconds tv_micro -#define Request tr_node -#define Time tr_time - /* ReAction (ClassAct) macros */ #define GetFileEnd End #define GetFontEnd End @@ -220,6 +214,12 @@ int alphasort(const struct dirent **d1, const struct dirent **d2); int scandir(const char *dir, struct dirent ***namelist, int (*filter)(const struct dirent *), int (*compar)(const struct dirent **, const struct dirent **)); -#endif -#endif +#else /* __amigaos4__ */ +/* TimeVal/TimeRequest */ +#define tv_secs Seconds +#define tv_micro Microseconds +#define tr_node Request +#define tr_time Time +#endif /* __amigaos4__ */ +#endif /* AMIGA_OS3SUPPRT_H_ */ diff --git a/frontends/amiga/schedule.c b/frontends/amiga/schedule.c index 307fff3..18eb1af 100644 --- a/frontends/amiga/schedule.c +++ b/frontends/amiga/schedule.c @@ -83,15 +83,15 @@ static nserror ami_schedule_add_timer_event(struct nscallback *nscb, int t) struct TimeVal tv; ULONG time_us = t * 1000; /* t converted to �s */ - tv.Seconds = time_us / 1000000; - tv.Microseconds = time_us % 1000000; + tv.tv_secs = time_us / 1000000; + tv.tv_micro = time_us % 1000000; GetSysTime(&nscb->tv); AddTime(&nscb->tv, &tv); // now contains time when event occurs (for debug and heap sorting) - nscb->timereq.Request.io_Command = TR_ADDREQUEST; - nscb->timereq.Time.Seconds = tv.Seconds; // secs - nscb->timereq.Time.Microseconds = tv.Microseconds; // micro + nscb->timereq.tr_node.io_Command = TR_ADDREQUEST; + nscb->timereq.tr_time.tv_secs = tv.tv_secs; // secs + nscb->timereq.tr_time.tv_micro = tv.tv_micro; // micro SendIO((struct IORequest *)nscb); return NSERROR_OK; @@ -219,27 +219,27 @@ static void ami_schedule_dump(void) PblIterator *iterator; struct nscallback *nscb; struct ClockData clockdata; - + if(pblHeapIsEmpty(schedule_list)) return; struct TimeVal tv; GetSysTime(&tv); - Amiga2Date(tv.Seconds, &clockdata); - + Amiga2Date(tv.tv_secs, &clockdata); + NSLOG(netsurf, INFO, "Current time = %d-%d-%d %d:%d:%d.%lu", clockdata.mday, clockdata.month, clockdata.year, - clockdata.hour, clockdata.min, clockdata.sec, tv.Microseconds); + clockdata.hour, clockdata.min, clockdata.sec, tv.tv_micro); NSLOG(netsurf, INFO, "Events remaining in queue:"); iterator = pblHeapIterator(schedule_list); while ((nscb = pblIteratorNext(iterator)) != (void *)-1) { - Amiga2Date(nscb->tv.Seconds, &clockdata); + Amiga2Date(nscb->tv.tv_secs, &clockdata); NSLOG(netsurf, INFO, "nscb: %p, at %d-%d-%d %d:%d:%d.%lu, callback: %p, %p", nscb, clockdata.mday, clockdata.month, clockdata.year, clockdata.hour, clockdata.min, clockdata.sec, - nscb->tv.Microseconds, nscb->callback, nscb->p); + nscb->tv.tv_micro, nscb->callback, nscb->p); if(CheckIO((struct IORequest *)nscb) == NULL) { NSLOG(netsurf, INFO, "-> ACTIVE"); } else { @@ -283,7 +283,7 @@ static void ami_schedule_open_timer(struct MsgPort *msgport) OpenDevice("timer.device", UNIT_VBLANK, (struct IORequest *)tioreq, 0); - TimerBase = (struct Device *)tioreq->timereq.Request.io_Device; + TimerBase = (struct Device *)tioreq->timereq.tr_node.io_Device; #ifdef __amigaos4__ ITimer = (struct TimerIFace *)GetInterface((struct Library *)TimerBase, "main", 1, NULL); #endif ----------------------------------------------------------------------- Summary of changes: frontends/amiga/font_cache.c | 4 ++-- frontends/amiga/os3support.h | 16 ++++++++-------- frontends/amiga/schedule.c | 24 ++++++++++++------------ 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/frontends/amiga/font_cache.c b/frontends/amiga/font_cache.c index b8039d2..cdb26fe 100644 --- a/frontends/amiga/font_cache.c +++ b/frontends/amiga/font_cache.c @@ -101,12 +101,12 @@ static void ami_font_cache_cleanup(struct MinList *ami_font_cache_list) fnode = node->objstruct; GetSysTime((struct timeval *)&curtime); SubTime((struct timeval *)&curtime, (struct timeval *)&fnode->lastused); - if(curtime.Seconds > 300) + if(curtime.tv_secs > 300) { NSLOG(netsurf, INFO, "Freeing %s not used for %d seconds", node->dtz_Node.ln_Name, - curtime.Seconds); + curtime.tv_secs); DelObject(node); } } while((node=nnode)); diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index f04b37b..2df0141 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -120,12 +120,6 @@ /* Renamed structures */ #define AnchorPathOld AnchorPath -/* TimeVal/TimeRequest */ -#define Seconds tv_secs -#define Microseconds tv_micro -#define Request tr_node -#define Time tr_time - /* ReAction (ClassAct) macros */ #define GetFileEnd End #define GetFontEnd End @@ -220,6 +214,12 @@ int alphasort(const struct dirent **d1, const struct dirent **d2); int scandir(const char *dir, struct dirent ***namelist, int (*filter)(const struct dirent *), int (*compar)(const struct dirent **, const struct dirent **)); -#endif -#endif +#else /* __amigaos4__ */ +/* TimeVal/TimeRequest */ +#define tv_secs Seconds +#define tv_micro Microseconds +#define tr_node Request +#define tr_time Time +#endif /* __amigaos4__ */ +#endif /* AMIGA_OS3SUPPRT_H_ */ diff --git a/frontends/amiga/schedule.c b/frontends/amiga/schedule.c index 307fff3..18eb1af 100644 --- a/frontends/amiga/schedule.c +++ b/frontends/amiga/schedule.c @@ -83,15 +83,15 @@ static nserror ami_schedule_add_timer_event(struct nscallback *nscb, int t) struct TimeVal tv; ULONG time_us = t * 1000; /* t converted to �s */ - tv.Seconds = time_us / 1000000; - tv.Microseconds = time_us % 1000000; + tv.tv_secs = time_us / 1000000; + tv.tv_micro = time_us % 1000000; GetSysTime(&nscb->tv); AddTime(&nscb->tv, &tv); // now contains time when event occurs (for debug and heap sorting) - nscb->timereq.Request.io_Command = TR_ADDREQUEST; - nscb->timereq.Time.Seconds = tv.Seconds; // secs - nscb->timereq.Time.Microseconds = tv.Microseconds; // micro + nscb->timereq.tr_node.io_Command = TR_ADDREQUEST; + nscb->timereq.tr_time.tv_secs = tv.tv_secs; // secs + nscb->timereq.tr_time.tv_micro = tv.tv_micro; // micro SendIO((struct IORequest *)nscb); return NSERROR_OK; @@ -219,27 +219,27 @@ static void ami_schedule_dump(void) PblIterator *iterator; struct nscallback *nscb; struct ClockData clockdata; - + if(pblHeapIsEmpty(schedule_list)) return; struct TimeVal tv; GetSysTime(&tv); - Amiga2Date(tv.Seconds, &clockdata); - + Amiga2Date(tv.tv_secs, &clockdata); + NSLOG(netsurf, INFO, "Current time = %d-%d-%d %d:%d:%d.%lu", clockdata.mday, clockdata.month, clockdata.year, - clockdata.hour, clockdata.min, clockdata.sec, tv.Microseconds); + clockdata.hour, clockdata.min, clockdata.sec, tv.tv_micro); NSLOG(netsurf, INFO, "Events remaining in queue:"); iterator = pblHeapIterator(schedule_list); while ((nscb = pblIteratorNext(iterator)) != (void *)-1) { - Amiga2Date(nscb->tv.Seconds, &clockdata); + Amiga2Date(nscb->tv.tv_secs, &clockdata); NSLOG(netsurf, INFO, "nscb: %p, at %d-%d-%d %d:%d:%d.%lu, callback: %p, %p", nscb, clockdata.mday, clockdata.month, clockdata.year, clockdata.hour, clockdata.min, clockdata.sec, - nscb->tv.Microseconds, nscb->callback, nscb->p); + nscb->tv.tv_micro, nscb->callback, nscb->p); if(CheckIO((struct IORequest *)nscb) == NULL) { NSLOG(netsurf, INFO, "-> ACTIVE"); } else { @@ -283,7 +283,7 @@ static void ami_schedule_open_timer(struct MsgPort *msgport) OpenDevice("timer.device", UNIT_VBLANK, (struct IORequest *)tioreq, 0); - TimerBase = (struct Device *)tioreq->timereq.Request.io_Device; + TimerBase = (struct Device *)tioreq->timereq.tr_node.io_Device; #ifdef __amigaos4__ ITimer = (struct TimerIFace *)GetInterface((struct Library *)TimerBase, "main", 1, NULL); #endif -- NetSurf Browser

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netsurf: branch chris/ndk32 updated. release/3.10-166-gcdf8214

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/netsurf.git/shortlog/cdf821454ae0328224c03... ...commit http://git.netsurf-browser.org/netsurf.git/commit/cdf821454ae0328224c0373... ...tree http://git.netsurf-browser.org/netsurf.git/tree/cdf821454ae0328224c037398... The branch, chris/ndk32 has been updated via cdf821454ae0328224c037398ac2f41ab4acd163 (commit) via c226bb0e4c99cab3ea7dfbf56a1cd54b7a8780bc (commit) via c5bc9b1aa7682fdae2c496de61ee300a72e7f0de (commit) from 6a5dcf12d65c6bac6b38d48139af965bac60486d (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=cdf821454ae0328224c... commit cdf821454ae0328224c037398ac2f41ab4acd163 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: remove more defines no longer needed with NDK 3.2 diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index ce7ae70..f04b37b 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -69,12 +69,8 @@ #define BITMAP_HasAlpha TAG_IGNORE #define BLITA_UseSrcAlpha TAG_IGNORE #define BLITA_MaskPlane TAG_IGNORE -#define CLICKTAB_CloseImage TAG_IGNORE #define CLICKTAB_FlagImage TAG_IGNORE #define CLICKTAB_LabelTruncate TAG_IGNORE -#define CLICKTAB_NodeClosed TAG_IGNORE -#define GETFONT_OTagOnly TAG_IGNORE -#define GETFONT_ScalableOnly TAG_IGNORE #define PDTA_PromoteMask TAG_IGNORE #define RPTAG_APenColor TAG_IGNORE #define GA_ContextMenu TAG_IGNORE @@ -84,9 +80,7 @@ #define LBNCA_SoftStyle TAG_IGNORE #define LISTBROWSER_Striping TAG_IGNORE #define SA_Compositing TAG_IGNORE -#define SBNA_Text TAG_IGNORE #define SBNA_HintInfo TAG_IGNORE -#define TNA_CloseGadget TAG_IGNORE #define TNA_HintInfo TAG_IGNORE #define WA_ContextMenuHook TAG_IGNORE #define WA_ToolBox TAG_IGNORE commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=c226bb0e4c99cab3ea7... commit c226bb0e4c99cab3ea7dfbf56a1cd54b7a8780bc Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: fix slab allocator type diff --git a/frontends/amiga/memory.c b/frontends/amiga/memory.c index 35ca969..17904f2 100755 --- a/frontends/amiga/memory.c +++ b/frontends/amiga/memory.c @@ -27,7 +27,7 @@ #include "content/llcache.h" #include "utils/log.h" -ULONG __slab_max_size = 2048; /* Enable clib2's slab allocator */ +unsigned long __slab_max_size = 2048; /* Enable clib2's slab allocator */ enum { PURGE_NONE = 0, commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=c5bc9b1aa7682fdae2c... commit c5bc9b1aa7682fdae2c496de61ee300a72e7f0de Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: remove UtilityBase conflict diff --git a/frontends/amiga/libs.c b/frontends/amiga/libs.c index 3c09bcb..fe94eb2 100644 --- a/frontends/amiga/libs.c +++ b/frontends/amiga/libs.c @@ -172,8 +172,6 @@ #ifdef __amigaos4__ AMINS_LIB_STRUCT(Application); -#else -AMINS_LIB_STRUCT(Utility) #endif AMINS_LIB_STRUCT(Asl); AMINS_LIB_STRUCT(DataTypes); ----------------------------------------------------------------------- Summary of changes: frontends/amiga/libs.c | 2 -- frontends/amiga/memory.c | 2 +- frontends/amiga/os3support.h | 6 ------ 3 files changed, 1 insertion(+), 9 deletions(-) diff --git a/frontends/amiga/libs.c b/frontends/amiga/libs.c index 3c09bcb..fe94eb2 100644 --- a/frontends/amiga/libs.c +++ b/frontends/amiga/libs.c @@ -172,8 +172,6 @@ #ifdef __amigaos4__ AMINS_LIB_STRUCT(Application); -#else -AMINS_LIB_STRUCT(Utility) #endif AMINS_LIB_STRUCT(Asl); AMINS_LIB_STRUCT(DataTypes); diff --git a/frontends/amiga/memory.c b/frontends/amiga/memory.c index 35ca969..17904f2 100755 --- a/frontends/amiga/memory.c +++ b/frontends/amiga/memory.c @@ -27,7 +27,7 @@ #include "content/llcache.h" #include "utils/log.h" -ULONG __slab_max_size = 2048; /* Enable clib2's slab allocator */ +unsigned long __slab_max_size = 2048; /* Enable clib2's slab allocator */ enum { PURGE_NONE = 0, diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index ce7ae70..f04b37b 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -69,12 +69,8 @@ #define BITMAP_HasAlpha TAG_IGNORE #define BLITA_UseSrcAlpha TAG_IGNORE #define BLITA_MaskPlane TAG_IGNORE -#define CLICKTAB_CloseImage TAG_IGNORE #define CLICKTAB_FlagImage TAG_IGNORE #define CLICKTAB_LabelTruncate TAG_IGNORE -#define CLICKTAB_NodeClosed TAG_IGNORE -#define GETFONT_OTagOnly TAG_IGNORE -#define GETFONT_ScalableOnly TAG_IGNORE #define PDTA_PromoteMask TAG_IGNORE #define RPTAG_APenColor TAG_IGNORE #define GA_ContextMenu TAG_IGNORE @@ -84,9 +80,7 @@ #define LBNCA_SoftStyle TAG_IGNORE #define LISTBROWSER_Striping TAG_IGNORE #define SA_Compositing TAG_IGNORE -#define SBNA_Text TAG_IGNORE #define SBNA_HintInfo TAG_IGNORE -#define TNA_CloseGadget TAG_IGNORE #define TNA_HintInfo TAG_IGNORE #define WA_ContextMenuHook TAG_IGNORE #define WA_ToolBox TAG_IGNORE -- NetSurf Browser

1 year, 8 months

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netsurf: branch chris/ndk32 updated. release/3.10-163-g6a5dcf1

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/netsurf.git/shortlog/6a5dcf12d65c6bac6b38d... ...commit http://git.netsurf-browser.org/netsurf.git/commit/6a5dcf12d65c6bac6b38d48... ...tree http://git.netsurf-browser.org/netsurf.git/tree/6a5dcf12d65c6bac6b38d4813... The branch, chris/ndk32 has been updated via 6a5dcf12d65c6bac6b38d48139af965bac60486d (commit) via 6d278450de112f97957b263efbefb3facc7880dc (commit) via d09bb58bfecd0c91dd07f1d941c33b12b391ac06 (commit) via 6451155a3b5b8ad4e42515fb6708d43af14b1c0b (commit) via 6471c6dd8b05a8e994830471ae413b7335aa7ae6 (commit) via b3cdb2da0bc60030e44588f219985861deed2bf7 (commit) via bdc414e239e27d28a76c1622b2bf2c442bdaa811 (commit) via 5612e6f15a85b8725fa2510ef068872be7a73ba3 (commit) from 1770a8d9b621c53717ddf026e2314d2693321d8a (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=6a5dcf12d65c6bac6b3... commit 6a5dcf12d65c6bac6b38d48139af965bac60486d Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: diskfont v47 compatibility diff --git a/frontends/amiga/font_scan.c b/frontends/amiga/font_scan.c index 3fa71f7..d7f970b 100644 --- a/frontends/amiga/font_scan.c +++ b/frontends/amiga/font_scan.c @@ -225,10 +225,6 @@ static ULONG ami_font_scan_font(const char *fontname, lwc_string **glypharray) if(!ofont) return 0; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif - if(ESetInfo(AMI_OFONT_ENGINE, OT_PointHeight, 10 * (1 << 16), OT_GlyphCode, 0x0000, commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=6d278450de112f97957... commit 6d278450de112f97957b263efbefb3facc7880dc Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: squash warnings diff --git a/frontends/amiga/font_cache.c b/frontends/amiga/font_cache.c index 86e2381..b8039d2 100644 --- a/frontends/amiga/font_cache.c +++ b/frontends/amiga/font_cache.c @@ -17,11 +17,13 @@ */ #include "amiga/os3support.h" -#include <string.h> #include <proto/timer.h> #include <proto/utility.h> +#include <string.h> +#include <stdlib.h> + #include "utils/log.h" #include "amiga/font.h" @@ -97,12 +99,12 @@ static void ami_font_cache_cleanup(struct MinList *ami_font_cache_list) { nnode=(struct nsObject *)GetSucc((struct Node *)node); fnode = node->objstruct; - GetSysTime(&curtime); - SubTime(&curtime, &fnode->lastused); + GetSysTime((struct timeval *)&curtime); + SubTime((struct timeval *)&curtime, (struct timeval *)&fnode->lastused); if(curtime.Seconds > 300) { NSLOG(netsurf, INFO, - "Freeing %s not used for %ld seconds", + "Freeing %s not used for %d seconds", node->dtz_Node.ln_Name, curtime.Seconds); DelObject(node); @@ -152,7 +154,7 @@ struct ami_font_cache_node *ami_font_cache_locate(const char *font) return nodedata; } - NSLOG(netsurf, INFO, "Font cache miss: %s (%lx)", font, hash); + NSLOG(netsurf, INFO, "Font cache miss: %s (%x)", font, hash); return NULL; } commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=d09bb58bfecd0c91dd0... commit d09bb58bfecd0c91dd07f1d941c33b12b391ac06 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: TimeVal and TimeRequest are different between OS4 and OS3.2 We are redefining some common words, so may need to rethink this if it causes problems. diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index 1c130d3..ce7ae70 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -126,6 +126,12 @@ /* Renamed structures */ #define AnchorPathOld AnchorPath +/* TimeVal/TimeRequest */ +#define Seconds tv_secs +#define Microseconds tv_micro +#define Request tr_node +#define Time tr_time + /* ReAction (ClassAct) macros */ #define GetFileEnd End #define GetFontEnd End commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=6451155a3b5b8ad4e42... commit 6451155a3b5b8ad4e42515fb6708d43af14b1c0b Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: use diskfont v47 API when building for AmigaOS 3 diff --git a/frontends/amiga/font_bullet.c b/frontends/amiga/font_bullet.c index dec39a1..5813e0f 100644 --- a/frontends/amiga/font_bullet.c +++ b/frontends/amiga/font_bullet.c @@ -25,15 +25,13 @@ #include <stdlib.h> -#ifndef __amigaos4__ -#include <proto/bullet.h> -#endif #include <proto/diskfont.h> #include <proto/exec.h> #include <proto/graphics.h> #include <proto/utility.h> #include <diskfont/diskfonttag.h> +#include <diskfont/glyph.h> /* for FIXED */ #include <diskfont/oterrors.h> #include "utils/log.h" @@ -527,10 +525,6 @@ static struct OutlineFont *ami_open_outline_font(const plot_font_style_t *fstyle ofont = designed_node->font; } -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif - if(ESetInfo(AMI_OFONT_ENGINE, OT_DeviceDPI, ami_font_dpi_get_devicedpi(), OT_PointHeight, ysize, @@ -555,9 +549,6 @@ static inline int32 ami_font_plot_glyph(struct OutlineFont *ofont, struct RastPo ULONG glyphmaptag; ULONG template_type; uint32 long_char_1 = 0, long_char_2 = 0; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif #ifndef __amigaos4__ if (__builtin_expect(((*char1 >= 0xD800) && (*char1 <= 0xDBFF)), 0)) { @@ -662,9 +653,6 @@ static inline int32 ami_font_width_glyph(struct OutlineFont *ofont, bool skip_c2 = false; uint32 long_char_1 = 0; uint32 long_char_2; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif #ifndef __amigaos4__ if (__builtin_expect(((*char1 >= 0xD800) && (*char1 <= 0xDBFF)), 0)) { diff --git a/frontends/amiga/font_scan.h b/frontends/amiga/font_scan.h index 7d61e2d..f1dd397 100755 --- a/frontends/amiga/font_scan.h +++ b/frontends/amiga/font_scan.h @@ -21,13 +21,9 @@ #include "amiga/os3support.h" #include <libwapcaplet/libwapcaplet.h> -/* Compatibliity define used by font.c and font_scan.c +/* Compatibility define used by font.c and font_scan.c * It's here because this file is included by both. */ -#ifdef __amigaos4__ #define AMI_OFONT_ENGINE &ofont->olf_EEngine -#else -#define AMI_OFONT_ENGINE ofont->GEngine -#endif void ami_font_scan_init(const char *filename, bool force_scan, bool save, lwc_string **glypharray); @@ -36,4 +32,3 @@ void ami_font_scan_save(const char *filename, lwc_string **glypharray); const char *ami_font_scan_lookup(const uint16 *code, lwc_string **glypharray); #endif - commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=6471c6dd8b05a8e9948... commit 6471c6dd8b05a8e994830471ae413b7335aa7ae6 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: remove some unneeded old ReAction compatiblity diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index c66588b..1c130d3 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -81,7 +81,6 @@ #define GA_HintInfo TAG_IGNORE #define GAUGEIA_Level TAG_IGNORE #define IA_InBorder TAG_IGNORE -#define IA_Label TAG_IGNORE #define LBNCA_SoftStyle TAG_IGNORE #define LISTBROWSER_Striping TAG_IGNORE #define SA_Compositing TAG_IGNORE @@ -92,7 +91,6 @@ #define WA_ContextMenuHook TAG_IGNORE #define WA_ToolBox TAG_IGNORE #define WINDOW_BuiltInScroll TAG_IGNORE -#define WINDOW_NewMenu TAG_IGNORE #define WINDOW_NewPrefsHook TAG_IGNORE /* raw keycodes */ @@ -120,7 +118,6 @@ #define TITLEPEN FILLPEN /* Other constants */ -#define BVS_DISPLAY BVS_NONE #define DN_FULLPATH 0 #define BGBACKFILL JAM1 #define ML_SEPARATOR NM_BARLABEL commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=b3cdb2da0bc60030e44... commit b3cdb2da0bc60030e44588f219985861deed2bf7 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: diskfont v47 also contains ObtainCharsetInfo(), although it appears to be undocumented diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index 0deda9a..c66588b 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -141,10 +141,6 @@ /* application */ #define Notify(...) (void)0 -/* diskfont */ -/* Only used in one place we haven't ifdeffed, where it returns the charset name */ -#define ObtainCharsetInfo(A,B,C) (const char *)nsoption_charp(local_charset) - /* DOS */ #define AllocSysObjectTags(A,B,C,D) CreateMsgPort() /* Assume ASOT_PORT for now */ #define FOpen(A,B,C) Open(A,B) commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=bdc414e239e27d28a76... commit bdc414e239e27d28a76c1622b2bf2c442bdaa811 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: squash warning diff --git a/frontends/amiga/bitmap.c b/frontends/amiga/bitmap.c index e160f93..6a6f860 100644 --- a/frontends/amiga/bitmap.c +++ b/frontends/amiga/bitmap.c @@ -155,9 +155,9 @@ void *amiga_bitmap_create(int width, int height, unsigned int state) return bitmap; } +#ifdef __amigaos4__ static void amiga_bitmap_unmap_buffer(void *p) { -#ifdef __amigaos4__ struct bitmap *bm = p; if((nsoption_bool(use_extmem) == true) && (bm->pixdata != NULL)) { @@ -168,8 +168,8 @@ static void amiga_bitmap_unmap_buffer(void *p) bm->iextmem->Unmap(bm->pixdata, bm->size); bm->pixdata = NULL; } -#endif } +#endif /* exported function documented in amiga/bitmap.h */ unsigned char *amiga_bitmap_get_buffer(void *bitmap) commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=5612e6f15a85b8725fa... commit 5612e6f15a85b8725fa2510ef068872be7a73ba3 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: remove compatibility functions that are in diskfont v47 May need to add these back in, force bitmap fonts, or drop compatiblity with OS3.5/9 diff --git a/frontends/amiga/os3support.c b/frontends/amiga/os3support.c index 63037da..23e922a 100644 --- a/frontends/amiga/os3support.c +++ b/frontends/amiga/os3support.c @@ -200,138 +200,6 @@ long long int strtoll(const char *nptr, char **endptr, int base) return (long long int)strtol(nptr, endptr, base); } -/* Diskfont */ -struct OutlineFont *OpenOutlineFont(STRPTR fileName, struct List *list, ULONG flags) -{ - BPTR fh = 0; - int64 size = 0; - struct TagItem *ti; - UBYTE *buffer; - STRPTR fname, otagpath, fontpath; - struct BulletBase *BulletBase; - struct OutlineFont *of = NULL; - struct GlyphEngine *gengine; - char *p = 0; - struct FontContentsHeader fch; - - if((p = strrchr(fileName, '.'))) - *p = '\0'; - - fontpath = (STRPTR)ASPrintf("FONTS:%s.font", fileName); - fh = Open(fontpath, MODE_OLDFILE); - - if(fh == 0) { - NSLOG(netsurf, INFO, "Unable to open FONT %s", fontpath); - FreeVec(fontpath); - return NULL; - } - - if(Read(fh, &fch, sizeof(struct FontContentsHeader)) != sizeof(struct FontContentsHeader)) { - NSLOG(netsurf, INFO, "Unable to read FONT %s", fontpath); - FreeVec(fontpath); - Close(fh); - return NULL; - } - - Close(fh); - - if(fch.fch_FileID != OFCH_ID) { - NSLOG(netsurf, INFO, "%s is not an outline font!", fontpath); - FreeVec(fontpath); - return NULL; - } - - otagpath = (STRPTR)ASPrintf("FONTS:%s.otag", fileName); - fh = Open(otagpath, MODE_OLDFILE); - - if(p) *p = '.'; - - if(fh == 0) { - NSLOG(netsurf, INFO, "Unable to open OTAG %s", otagpath); - FreeVec(otagpath); - return NULL; - } - - size = GetFileSize(fh); - buffer = (UBYTE *)malloc(size); - if(buffer == NULL) { - NSLOG(netsurf, INFO, "Unable to allocate memory"); - Close(fh); - FreeVec(otagpath); - return NULL; - } - - Read(fh, buffer, size); - Close(fh); - - /* The first tag is supposed to be OT_FileIdent and should equal 'size' */ - struct TagItem *tag = (struct TagItem *)buffer; - if((tag->ti_Tag != OT_FileIdent) || (tag->ti_Data != (ULONG)size)) { - NSLOG(netsurf, INFO, "Invalid OTAG file"); - free(buffer); - FreeVec(otagpath); - return NULL; - } - - /* Relocate all the OT_Indirect tags */ - while((ti = NextTagItem(&tag))) { - if(ti->ti_Tag & OT_Indirect) { - ti->ti_Data += (ULONG)buffer; - } - } - - /* Find OT_Engine and open the font engine */ - if(ti = FindTagItem(OT_Engine, buffer)) { - NSLOG(netsurf, INFO, "Using font engine %s", ti->ti_Data); - fname = ASPrintf("%s.library", ti->ti_Data); - } else { - NSLOG(netsurf, INFO, "Cannot find OT_Engine tag"); - free(buffer); - FreeVec(otagpath); - return NULL; - } - - BulletBase = (struct BulletBase *)OpenLibrary(fname, 0L); - - if(BulletBase == NULL) { - NSLOG(netsurf, INFO, "Unable to open font engine %s", fname); - free(buffer); - FreeVec(fname); - FreeVec(otagpath); - } - - FreeVec(fname); - - gengine = OpenEngine(); - - SetInfo(gengine, - OT_OTagPath, (ULONG)otagpath, - OT_OTagList, (ULONG)buffer, - TAG_DONE); - - of = calloc(1, sizeof(struct OutlineFont)); - if(of == NULL) return NULL; - - of->BulletBase = BulletBase; - of->GEngine = gengine; - of->OTagPath = otagpath; - of->olf_OTagList = buffer; - - return of; -} - -void CloseOutlineFont(struct OutlineFont *of, struct List *list) -{ - struct BulletBase *BulletBase = of->BulletBase; - - CloseEngine(of->GEngine); - CloseLibrary((struct Library *)BulletBase); - - FreeVec(of->OTagPath); - free(of->olf_OTagList); - free(of); -} - /* DOS */ int64 GetFileSize(BPTR fh) diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index f511012..0deda9a 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -123,8 +123,6 @@ #define BVS_DISPLAY BVS_NONE #define DN_FULLPATH 0 #define BGBACKFILL JAM1 -#define OFF_OPEN 0 -#define AFF_OTAG 0 #define ML_SEPARATOR NM_BARLABEL #define LBS_ROWS 0 @@ -144,10 +142,6 @@ #define Notify(...) (void)0 /* diskfont */ -#define EReleaseInfo ReleaseInfo -#define EObtainInfo ObtainInfo -#define ESetInfo SetInfo - /* Only used in one place we haven't ifdeffed, where it returns the charset name */ #define ObtainCharsetInfo(A,B,C) (const char *)nsoption_charp(local_charset) @@ -181,14 +175,6 @@ typedef uint32_t uint32; typedef int64_t int64; typedef uint64_t uint64; -/* OutlineFont */ -struct OutlineFont { - struct BulletBase *BulletBase; - struct GlyphEngine *GEngine; - STRPTR OTagPath; - struct TagItem *olf_OTagList; -}; - /* BackFillMessage */ struct BackFillMessage { struct Layer *Layer; @@ -218,10 +204,6 @@ enum { }; /* Functions */ -/* Diskfont */ -void CloseOutlineFont(struct OutlineFont *of, struct List *list); -struct OutlineFont *OpenOutlineFont(STRPTR fileName, struct List *list, ULONG flags); - /* DOS */ int64 GetFileSize(BPTR fh); void FreeSysObject(ULONG type, APTR obj); ----------------------------------------------------------------------- Summary of changes: frontends/amiga/bitmap.c | 4 +- frontends/amiga/font_bullet.c | 14 +---- frontends/amiga/font_cache.c | 12 ++-- frontends/amiga/font_scan.c | 4 -- frontends/amiga/font_scan.h | 7 +-- frontends/amiga/os3support.c | 132 ----------------------------------------- frontends/amiga/os3support.h | 31 ++-------- 7 files changed, 17 insertions(+), 187 deletions(-) diff --git a/frontends/amiga/bitmap.c b/frontends/amiga/bitmap.c index e160f93..6a6f860 100644 --- a/frontends/amiga/bitmap.c +++ b/frontends/amiga/bitmap.c @@ -155,9 +155,9 @@ void *amiga_bitmap_create(int width, int height, unsigned int state) return bitmap; } +#ifdef __amigaos4__ static void amiga_bitmap_unmap_buffer(void *p) { -#ifdef __amigaos4__ struct bitmap *bm = p; if((nsoption_bool(use_extmem) == true) && (bm->pixdata != NULL)) { @@ -168,8 +168,8 @@ static void amiga_bitmap_unmap_buffer(void *p) bm->iextmem->Unmap(bm->pixdata, bm->size); bm->pixdata = NULL; } -#endif } +#endif /* exported function documented in amiga/bitmap.h */ unsigned char *amiga_bitmap_get_buffer(void *bitmap) diff --git a/frontends/amiga/font_bullet.c b/frontends/amiga/font_bullet.c index dec39a1..5813e0f 100644 --- a/frontends/amiga/font_bullet.c +++ b/frontends/amiga/font_bullet.c @@ -25,15 +25,13 @@ #include <stdlib.h> -#ifndef __amigaos4__ -#include <proto/bullet.h> -#endif #include <proto/diskfont.h> #include <proto/exec.h> #include <proto/graphics.h> #include <proto/utility.h> #include <diskfont/diskfonttag.h> +#include <diskfont/glyph.h> /* for FIXED */ #include <diskfont/oterrors.h> #include "utils/log.h" @@ -527,10 +525,6 @@ static struct OutlineFont *ami_open_outline_font(const plot_font_style_t *fstyle ofont = designed_node->font; } -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif - if(ESetInfo(AMI_OFONT_ENGINE, OT_DeviceDPI, ami_font_dpi_get_devicedpi(), OT_PointHeight, ysize, @@ -555,9 +549,6 @@ static inline int32 ami_font_plot_glyph(struct OutlineFont *ofont, struct RastPo ULONG glyphmaptag; ULONG template_type; uint32 long_char_1 = 0, long_char_2 = 0; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif #ifndef __amigaos4__ if (__builtin_expect(((*char1 >= 0xD800) && (*char1 <= 0xDBFF)), 0)) { @@ -662,9 +653,6 @@ static inline int32 ami_font_width_glyph(struct OutlineFont *ofont, bool skip_c2 = false; uint32 long_char_1 = 0; uint32 long_char_2; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif #ifndef __amigaos4__ if (__builtin_expect(((*char1 >= 0xD800) && (*char1 <= 0xDBFF)), 0)) { diff --git a/frontends/amiga/font_cache.c b/frontends/amiga/font_cache.c index 86e2381..b8039d2 100644 --- a/frontends/amiga/font_cache.c +++ b/frontends/amiga/font_cache.c @@ -17,11 +17,13 @@ */ #include "amiga/os3support.h" -#include <string.h> #include <proto/timer.h> #include <proto/utility.h> +#include <string.h> +#include <stdlib.h> + #include "utils/log.h" #include "amiga/font.h" @@ -97,12 +99,12 @@ static void ami_font_cache_cleanup(struct MinList *ami_font_cache_list) { nnode=(struct nsObject *)GetSucc((struct Node *)node); fnode = node->objstruct; - GetSysTime(&curtime); - SubTime(&curtime, &fnode->lastused); + GetSysTime((struct timeval *)&curtime); + SubTime((struct timeval *)&curtime, (struct timeval *)&fnode->lastused); if(curtime.Seconds > 300) { NSLOG(netsurf, INFO, - "Freeing %s not used for %ld seconds", + "Freeing %s not used for %d seconds", node->dtz_Node.ln_Name, curtime.Seconds); DelObject(node); @@ -152,7 +154,7 @@ struct ami_font_cache_node *ami_font_cache_locate(const char *font) return nodedata; } - NSLOG(netsurf, INFO, "Font cache miss: %s (%lx)", font, hash); + NSLOG(netsurf, INFO, "Font cache miss: %s (%x)", font, hash); return NULL; } diff --git a/frontends/amiga/font_scan.c b/frontends/amiga/font_scan.c index 3fa71f7..d7f970b 100644 --- a/frontends/amiga/font_scan.c +++ b/frontends/amiga/font_scan.c @@ -225,10 +225,6 @@ static ULONG ami_font_scan_font(const char *fontname, lwc_string **glypharray) if(!ofont) return 0; -#ifndef __amigaos4__ - struct BulletBase *BulletBase = ofont->BulletBase; -#endif - if(ESetInfo(AMI_OFONT_ENGINE, OT_PointHeight, 10 * (1 << 16), OT_GlyphCode, 0x0000, diff --git a/frontends/amiga/font_scan.h b/frontends/amiga/font_scan.h index 7d61e2d..f1dd397 100755 --- a/frontends/amiga/font_scan.h +++ b/frontends/amiga/font_scan.h @@ -21,13 +21,9 @@ #include "amiga/os3support.h" #include <libwapcaplet/libwapcaplet.h> -/* Compatibliity define used by font.c and font_scan.c +/* Compatibility define used by font.c and font_scan.c * It's here because this file is included by both. */ -#ifdef __amigaos4__ #define AMI_OFONT_ENGINE &ofont->olf_EEngine -#else -#define AMI_OFONT_ENGINE ofont->GEngine -#endif void ami_font_scan_init(const char *filename, bool force_scan, bool save, lwc_string **glypharray); @@ -36,4 +32,3 @@ void ami_font_scan_save(const char *filename, lwc_string **glypharray); const char *ami_font_scan_lookup(const uint16 *code, lwc_string **glypharray); #endif - diff --git a/frontends/amiga/os3support.c b/frontends/amiga/os3support.c index 63037da..23e922a 100644 --- a/frontends/amiga/os3support.c +++ b/frontends/amiga/os3support.c @@ -200,138 +200,6 @@ long long int strtoll(const char *nptr, char **endptr, int base) return (long long int)strtol(nptr, endptr, base); } -/* Diskfont */ -struct OutlineFont *OpenOutlineFont(STRPTR fileName, struct List *list, ULONG flags) -{ - BPTR fh = 0; - int64 size = 0; - struct TagItem *ti; - UBYTE *buffer; - STRPTR fname, otagpath, fontpath; - struct BulletBase *BulletBase; - struct OutlineFont *of = NULL; - struct GlyphEngine *gengine; - char *p = 0; - struct FontContentsHeader fch; - - if((p = strrchr(fileName, '.'))) - *p = '\0'; - - fontpath = (STRPTR)ASPrintf("FONTS:%s.font", fileName); - fh = Open(fontpath, MODE_OLDFILE); - - if(fh == 0) { - NSLOG(netsurf, INFO, "Unable to open FONT %s", fontpath); - FreeVec(fontpath); - return NULL; - } - - if(Read(fh, &fch, sizeof(struct FontContentsHeader)) != sizeof(struct FontContentsHeader)) { - NSLOG(netsurf, INFO, "Unable to read FONT %s", fontpath); - FreeVec(fontpath); - Close(fh); - return NULL; - } - - Close(fh); - - if(fch.fch_FileID != OFCH_ID) { - NSLOG(netsurf, INFO, "%s is not an outline font!", fontpath); - FreeVec(fontpath); - return NULL; - } - - otagpath = (STRPTR)ASPrintf("FONTS:%s.otag", fileName); - fh = Open(otagpath, MODE_OLDFILE); - - if(p) *p = '.'; - - if(fh == 0) { - NSLOG(netsurf, INFO, "Unable to open OTAG %s", otagpath); - FreeVec(otagpath); - return NULL; - } - - size = GetFileSize(fh); - buffer = (UBYTE *)malloc(size); - if(buffer == NULL) { - NSLOG(netsurf, INFO, "Unable to allocate memory"); - Close(fh); - FreeVec(otagpath); - return NULL; - } - - Read(fh, buffer, size); - Close(fh); - - /* The first tag is supposed to be OT_FileIdent and should equal 'size' */ - struct TagItem *tag = (struct TagItem *)buffer; - if((tag->ti_Tag != OT_FileIdent) || (tag->ti_Data != (ULONG)size)) { - NSLOG(netsurf, INFO, "Invalid OTAG file"); - free(buffer); - FreeVec(otagpath); - return NULL; - } - - /* Relocate all the OT_Indirect tags */ - while((ti = NextTagItem(&tag))) { - if(ti->ti_Tag & OT_Indirect) { - ti->ti_Data += (ULONG)buffer; - } - } - - /* Find OT_Engine and open the font engine */ - if(ti = FindTagItem(OT_Engine, buffer)) { - NSLOG(netsurf, INFO, "Using font engine %s", ti->ti_Data); - fname = ASPrintf("%s.library", ti->ti_Data); - } else { - NSLOG(netsurf, INFO, "Cannot find OT_Engine tag"); - free(buffer); - FreeVec(otagpath); - return NULL; - } - - BulletBase = (struct BulletBase *)OpenLibrary(fname, 0L); - - if(BulletBase == NULL) { - NSLOG(netsurf, INFO, "Unable to open font engine %s", fname); - free(buffer); - FreeVec(fname); - FreeVec(otagpath); - } - - FreeVec(fname); - - gengine = OpenEngine(); - - SetInfo(gengine, - OT_OTagPath, (ULONG)otagpath, - OT_OTagList, (ULONG)buffer, - TAG_DONE); - - of = calloc(1, sizeof(struct OutlineFont)); - if(of == NULL) return NULL; - - of->BulletBase = BulletBase; - of->GEngine = gengine; - of->OTagPath = otagpath; - of->olf_OTagList = buffer; - - return of; -} - -void CloseOutlineFont(struct OutlineFont *of, struct List *list) -{ - struct BulletBase *BulletBase = of->BulletBase; - - CloseEngine(of->GEngine); - CloseLibrary((struct Library *)BulletBase); - - FreeVec(of->OTagPath); - free(of->olf_OTagList); - free(of); -} - /* DOS */ int64 GetFileSize(BPTR fh) diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index f511012..ce7ae70 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -81,7 +81,6 @@ #define GA_HintInfo TAG_IGNORE #define GAUGEIA_Level TAG_IGNORE #define IA_InBorder TAG_IGNORE -#define IA_Label TAG_IGNORE #define LBNCA_SoftStyle TAG_IGNORE #define LISTBROWSER_Striping TAG_IGNORE #define SA_Compositing TAG_IGNORE @@ -92,7 +91,6 @@ #define WA_ContextMenuHook TAG_IGNORE #define WA_ToolBox TAG_IGNORE #define WINDOW_BuiltInScroll TAG_IGNORE -#define WINDOW_NewMenu TAG_IGNORE #define WINDOW_NewPrefsHook TAG_IGNORE /* raw keycodes */ @@ -120,17 +118,20 @@ #define TITLEPEN FILLPEN /* Other constants */ -#define BVS_DISPLAY BVS_NONE #define DN_FULLPATH 0 #define BGBACKFILL JAM1 -#define OFF_OPEN 0 -#define AFF_OTAG 0 #define ML_SEPARATOR NM_BARLABEL #define LBS_ROWS 0 /* Renamed structures */ #define AnchorPathOld AnchorPath +/* TimeVal/TimeRequest */ +#define Seconds tv_secs +#define Microseconds tv_micro +#define Request tr_node +#define Time tr_time + /* ReAction (ClassAct) macros */ #define GetFileEnd End #define GetFontEnd End @@ -143,14 +144,6 @@ /* application */ #define Notify(...) (void)0 -/* diskfont */ -#define EReleaseInfo ReleaseInfo -#define EObtainInfo ObtainInfo -#define ESetInfo SetInfo - -/* Only used in one place we haven't ifdeffed, where it returns the charset name */ -#define ObtainCharsetInfo(A,B,C) (const char *)nsoption_charp(local_charset) - /* DOS */ #define AllocSysObjectTags(A,B,C,D) CreateMsgPort() /* Assume ASOT_PORT for now */ #define FOpen(A,B,C) Open(A,B) @@ -181,14 +174,6 @@ typedef uint32_t uint32; typedef int64_t int64; typedef uint64_t uint64; -/* OutlineFont */ -struct OutlineFont { - struct BulletBase *BulletBase; - struct GlyphEngine *GEngine; - STRPTR OTagPath; - struct TagItem *olf_OTagList; -}; - /* BackFillMessage */ struct BackFillMessage { struct Layer *Layer; @@ -218,10 +203,6 @@ enum { }; /* Functions */ -/* Diskfont */ -void CloseOutlineFont(struct OutlineFont *of, struct List *list); -struct OutlineFont *OpenOutlineFont(STRPTR fileName, struct List *list, ULONG flags); - /* DOS */ int64 GetFileSize(BPTR fh); void FreeSysObject(ULONG type, APTR obj); -- NetSurf Browser

1 year, 8 months

1
0
0 / 0

toolchains: branch chris/ndk32 updated. 2ae3ecf3d5913f6971d45abc2df96663e0db691e

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/toolchains.git/shortlog/2ae3ecf3d5913f6971... ...commit http://git.netsurf-browser.org/toolchains.git/commit/2ae3ecf3d5913f6971d4... ...tree http://git.netsurf-browser.org/toolchains.git/tree/2ae3ecf3d5913f6971d45a... The branch, chris/ndk32 has been updated via 2ae3ecf3d5913f6971d45abc2df96663e0db691e (commit) from 26bf2874121f488ef2d08c1b306ab98bb11a5f09 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/toolchains.git/commit/?id=2ae3ecf3d5913f69... commit 2ae3ecf3d5913f6971d45abc2df96663e0db691e Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> m68k-amigaos: fix patching of NDK diff --git a/m68k-unknown-amigaos/Makefile b/m68k-unknown-amigaos/Makefile index 7d0e0ea..df1f4bd 100644 --- a/m68k-unknown-amigaos/Makefile +++ b/m68k-unknown-amigaos/Makefile @@ -127,6 +127,9 @@ $(BUILDSTEPS)/clib2-src.d: $(SOURCESDIR)/$(UPSTREAM_CLIB2_TARBALL) $(BUILDSTEPS)/ndk.d: $(SOURCESDIR)/$(UPSTREAM_NDK_TARBALL) $(SOURCESDIR)/$(UPSTREAM_OPENURL_TARBALL) $(SOURCESDIR)/$(UPSTREAM_GUIGFX_TARBALL) $(SOURCESDIR)/$(UPSTREAM_RENDER_TARBALL) $(SOURCESDIR)/$(UPSTREAM_CODESETS_TARBALL) $(SOURCESDIR)/$(UPSTREAM_AMISSL_TARBALL) mkdir -p $(BUILDDIR)/ndk lha xw=$(BUILDDIR)/ndk $(SOURCESDIR)/$(UPSTREAM_NDK_TARBALL) + for p in `ls $(RECIPES)/patches/ndk/*.p` ; do patch -d $(BUILDDIR)/ndk -p0 <$$p || exit $0 ; done + for dir in `find $(RECIPES)/files/ndk/ -type d | grep -v '\.svn' | sed 's#$(RECIPES)/files/ndk##'` ; do mkdir -p $(BUILDDIR)/ndk/NDK3.2$$dir ; done + for file in `find $(RECIPES)/files/ndk/ -type f | grep -v '\.svn' | sed 's#$(RECIPES)/files/ndk##'` ; do cp -p $(RECIPES)/files/ndk$$file $(BUILDDIR)/ndk/NDK3.2$$file ; done mkdir -p $(PREFIX)/$(TARGET_NAME)/sys-include cp -r $(BUILDDIR)/ndk/NDK3.2/Include_H/* $(PREFIX)/$(TARGET_NAME)/sys-include mkdir -p $(BUILDDIR)/openurl diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/Picasso96.h new file mode 100644 index 0000000..74443cb --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/Picasso96.h @@ -0,0 +1,171 @@ +/* Automatically generated header! Do not edit! */ + +#ifndef _INLINE_PICASSO96API_H +#define _INLINE_PICASSO96API_H + +#ifndef __INLINE_MACROS_H +#include <inline/macros.h> +#endif /* !__INLINE_MACROS_H */ + +#ifndef PICASSO96API_BASE_NAME +#define PICASSO96API_BASE_NAME P96Base +#endif /* !PICASSO96API_BASE_NAME */ + +#define p96AllocBitMap(SizeX, SizeY, Depth, Flags, Friend, RGBFormat) \ + LP6(0x1e, struct BitMap *, p96AllocBitMap, ULONG, SizeX, d0, ULONG, SizeY, d1, ULONG, Depth, d2, ULONG, Flags, d3, struct BitMap *, Friend, a0, RGBFTYPE, RGBFormat, d7, \ + , PICASSO96API_BASE_NAME) + +#define p96AllocModeListTagList(Tags) \ + LP1(0x48, struct List *, p96AllocModeListTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96AllocModeListTags(tags...) \ + ({ULONG _tags[] = { tags }; p96AllocModeListTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96BestModeIDTagList(Tags) \ + LP1(0x3c, ULONG, p96BestModeIDTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96BestModeIDTags(tags...) \ + ({ULONG _tags[] = { tags }; p96BestModeIDTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96CloseScreen(Screen_) \ + LP1(0x60, BOOL, p96CloseScreen, struct Screen *, Screen_, a0, \ + , PICASSO96API_BASE_NAME) + +#define p96EncodeColor(RGBFormat, Color) \ + LP2(0xc0, ULONG, p96EncodeColor, RGBFTYPE, RGBFormat, d0, ULONG, Color, d1, \ + , PICASSO96API_BASE_NAME) + +#define p96FreeBitMap(BitMap_) \ + LP1NR(0x24, p96FreeBitMap, struct BitMap *, BitMap_, a0, \ + , PICASSO96API_BASE_NAME) + +#define p96FreeModeList(List_) \ + LP1NR(0x4e, p96FreeModeList, struct List *, List_, a0, \ + , PICASSO96API_BASE_NAME) + +#define p96GetBitMapAttr(BitMap_, Attribute) \ + LP2(0x2a, ULONG, p96GetBitMapAttr, struct BitMap *, BitMap_, a0, ULONG, Attribute, d0, \ + , PICASSO96API_BASE_NAME) + +#define p96GetBoardDataTagList(Board, Tags) \ + LP2(0xba, LONG, p96GetBoardDataTagList, ULONG, Board, d0, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96GetBoardDataTags(a0, tags...) \ + ({ULONG _tags[] = { tags }; p96GetBoardDataTagList((a0), (struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96GetModeIDAttr(Mode, Attribute) \ + LP2(0x54, ULONG, p96GetModeIDAttr, ULONG, Mode, d0, ULONG, Attribute, d1, \ + , PICASSO96API_BASE_NAME) + +#define p96GetRTGDataTagList(Tags) \ + LP1(0xb4, LONG, p96GetRTGDataTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96GetRTGDataTags(tags...) \ + ({ULONG _tags[] = { tags }; p96GetRTGDataTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96LockBitMap(BitMap_, Buffer, Size) \ + LP3(0x30, LONG, p96LockBitMap, struct BitMap *, BitMap_, a0, UBYTE *, Buffer, a1, ULONG, Size, d0, \ + , PICASSO96API_BASE_NAME) + +#define p96OpenScreenTagList(Tags) \ + LP1(0x5a, struct Screen *, p96OpenScreenTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96OpenScreenTags(tags...) \ + ({ULONG _tags[] = { tags }; p96OpenScreenTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96PIP_Close(Window_) \ + LP1(0x96, BOOL, p96PIP_Close, struct Window *, Window_, a0, \ + , PICASSO96API_BASE_NAME) + +#define p96PIP_GetIMsg(Port) \ + LP1(0xa8, struct IntuiMessage *, p96PIP_GetIMsg, struct MsgPort *, Port, a0, \ + , PICASSO96API_BASE_NAME) + +#define p96PIP_GetTagList(Window_, Tags) \ + LP2(0xa2, LONG, p96PIP_GetTagList, struct Window *, Window_, a0, struct TagItem *, Tags, a1, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96PIP_GetTags(a0, tags...) \ + ({ULONG _tags[] = { tags }; p96PIP_GetTagList((a0), (struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96PIP_OpenTagList(Tags) \ + LP1(0x90, struct Window *, p96PIP_OpenTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96PIP_OpenTags(tags...) \ + ({ULONG _tags[] = { tags }; p96PIP_OpenTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96PIP_ReplyIMsg(IntuiMessage_) \ + LP1NR(0xae, p96PIP_ReplyIMsg, struct IntuiMessage *, IntuiMessage_, a1, \ + , PICASSO96API_BASE_NAME) + +#define p96PIP_SetTagList(Window_, Tags) \ + LP2(0x9c, LONG, p96PIP_SetTagList, struct Window *, Window_, a0, struct TagItem *, Tags, a1, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96PIP_SetTags(a0, tags...) \ + ({ULONG _tags[] = { tags }; p96PIP_SetTagList((a0), (struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96ReadPixel(rp, x, y) \ + LP3(0x78, ULONG, p96ReadPixel, struct RastPort *, rp, a1, UWORD, x, d0, UWORD, y, d1, \ + , PICASSO96API_BASE_NAME) + +#define p96ReadPixelArray(ri, DestX, DestY, rp, SrcX, SrcY, SizeX, SizeY) \ + LP8NR(0x6c, p96ReadPixelArray, struct RenderInfo *, ri, a0, UWORD, DestX, d0, UWORD, DestY, d1, struct RastPort *, rp, a1, UWORD, SrcX, d2, UWORD, SrcY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ + , PICASSO96API_BASE_NAME) + +#define p96ReadTrueColorData(tci, DestX, DestY, rp, SrcX, SrcY, SizeX, SizeY) \ + LP8NR(0x8a, p96ReadTrueColorData, struct TrueColorInfo *, tci, a0, UWORD, DestX, d0, UWORD, DestY, d1, struct RastPort *, rp, a1, UWORD, SrcX, d2, UWORD, SrcY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ + , PICASSO96API_BASE_NAME) + +#define p96RectFill(rp, MinX, MinY, MaxX, MaxY, color) \ + LP6NR(0x7e, p96RectFill, struct RastPort *, rp, a1, UWORD, MinX, d0, UWORD, MinY, d1, UWORD, MaxX, d2, UWORD, MaxY, d3, ULONG, color, d4, \ + , PICASSO96API_BASE_NAME) + +#define p96RequestModeIDTagList(Tags) \ + LP1(0x42, ULONG, p96RequestModeIDTagList, struct TagItem *, Tags, a0, \ + , PICASSO96API_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define p96RequestModeIDTags(tags...) \ + ({ULONG _tags[] = { tags }; p96RequestModeIDTagList((struct TagItem *)_tags);}) +#endif /* !NO_INLINE_STDARG */ + +#define p96UnlockBitMap(BitMap_, Lock) \ + LP2NR(0x36, p96UnlockBitMap, struct BitMap *, BitMap_, a0, LONG, Lock, d0, \ + , PICASSO96API_BASE_NAME) + +#define p96WritePixel(rp, x, y, color) \ + LP4(0x72, ULONG, p96WritePixel, struct RastPort *, rp, a1, UWORD, x, d0, UWORD, y, d1, ULONG, color, d2, \ + , PICASSO96API_BASE_NAME) + +#define p96WritePixelArray(ri, SrcX, SrcY, rp, DestX, DestY, SizeX, SizeY) \ + LP8NR(0x66, p96WritePixelArray, struct RenderInfo *, ri, a0, UWORD, SrcX, d0, UWORD, SrcY, d1, struct RastPort *, rp, a1, UWORD, DestX, d2, UWORD, DestY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ + , PICASSO96API_BASE_NAME) + +#define p96WriteTrueColorData(tci, SrcX, SrcY, rp, DestX, DestY, SizeX, SizeY) \ + LP8NR(0x84, p96WriteTrueColorData, struct TrueColorInfo *, tci, a0, UWORD, SrcX, d0, UWORD, SrcY, d1, struct RastPort *, rp, a1, UWORD, DestX, d2, UWORD, DestY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ + , PICASSO96API_BASE_NAME) + +#endif /* !_INLINE_PICASSO96API_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/guigfx.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/guigfx.h new file mode 100644 index 0000000..a12650a --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/guigfx.h @@ -0,0 +1,224 @@ +#ifndef _INLINE_GUIGFX_H +#define _INLINE_GUIGFX_H + +#ifndef CLIB_GUIGFX_PROTOS_H +#define CLIB_GUIGFX_PROTOS_H +#endif + +#ifndef __INLINE_MACROS_H +#include <inline/macros.h> +#endif + +#ifndef EXEC_TYPES_H +#include <exec/types.h> +#endif + +#ifndef GUIGFX_BASE_NAME +#define GUIGFX_BASE_NAME GuiGFXBase +#endif + +#define MakePictureA(array, width, height, tags) \ + LP4(0x1e, APTR, MakePictureA, APTR, array, a0, UWORD, width, d0, UWORD, height, d1, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define MakePicture(array, width, height, tags...) \ + ({ULONG _tags[] = {tags}; MakePictureA((array), (width), (height), (struct TagItem *) _tags);}) +#endif + +#define LoadPictureA(filename, tags) \ + LP2(0x24, APTR, LoadPictureA, STRPTR, filename, a0, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define LoadPicture(filename, tags...) \ + ({ULONG _tags[] = {tags}; LoadPictureA((filename), (struct TagItem *) _tags);}) +#endif + +#define ReadPictureA(a0arg, colormap, x, y, width, height, tags) \ + LP7(0x2a, APTR, ReadPictureA, struct RastPort *, a0arg, a0, struct ColorMap *, colormap, a1, UWORD, x, d0, UWORD, y, d1, UWORD, width, d2, UWORD, height, d3, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define ReadPicture(a0arg, colormap, x, y, width, height, tags...) \ + ({ULONG _tags[] = {tags}; ReadPictureA((a0arg), (colormap), (x), (y), (width), (height), (struct TagItem *) _tags);}) +#endif + +#define ClonePictureA(pic, tags) \ + LP2(0x30, APTR, ClonePictureA, APTR, pic, a0, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define ClonePicture(pic, tags...) \ + ({ULONG _tags[] = {tags}; ClonePictureA((pic), (struct TagItem *) _tags);}) +#endif + +#define DeletePicture(pic) \ + LP1NR(0x36, DeletePicture, APTR, pic, a0, \ + , GUIGFX_BASE_NAME) + +#define AddPictureA(psm, pic, tags) \ + LP3(0x42, APTR, AddPictureA, APTR, psm, a0, APTR, pic, a1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define AddPicture(psm, pic, tags...) \ + ({ULONG _tags[] = {tags}; AddPictureA((psm), (pic), (struct TagItem *) _tags);}) +#endif + +#define AddPaletteA(psm, palette, tags) \ + LP3(0x48, APTR, AddPaletteA, APTR, psm, a0, APTR, palette, a1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define AddPalette(psm, palette, tags...) \ + ({ULONG _tags[] = {tags}; AddPaletteA((psm), (palette), (struct TagItem *) _tags);}) +#endif + +#define AddPixelArrayA(psm, array, width, height, tags) \ + LP5(0x4e, APTR, AddPixelArrayA, APTR, psm, a0, APTR, array, a1, UWORD, width, d0, UWORD, height, d1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define AddPixelArray(psm, array, width, height, tags...) \ + ({ULONG _tags[] = {tags}; AddPixelArrayA((psm), (array), (width), (height), (struct TagItem *) _tags);}) +#endif + +#define RemColorHandle(colorhandle) \ + LP1NR(0x54, RemColorHandle, APTR, colorhandle, a0, \ + , GUIGFX_BASE_NAME) + +#define CreatePenShareMapA(tags) \ + LP1(0x5a, APTR, CreatePenShareMapA, struct TagItem *, tags, a0, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define CreatePenShareMap(tags...) \ + ({ULONG _tags[] = {tags}; CreatePenShareMapA((struct TagItem *) _tags);}) +#endif + +#define DeletePenShareMap(psm) \ + LP1NR(0x60, DeletePenShareMap, APTR, psm, a0, \ + , GUIGFX_BASE_NAME) + +#define ObtainDrawHandleA(psm, a1arg, cm, tags) \ + LP4(0x66, APTR, ObtainDrawHandleA, APTR, psm, a0, struct RastPort *, a1arg, a1, struct ColorMap *, cm, a2, struct TagItem *, tags, a3, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define ObtainDrawHandle(psm, a1arg, cm, tags...) \ + ({ULONG _tags[] = {tags}; ObtainDrawHandleA((psm), (a1arg), (cm), (struct TagItem *) _tags);}) +#endif + +#define ReleaseDrawHandle(drawhandle) \ + LP1NR(0x6c, ReleaseDrawHandle, APTR, drawhandle, a0, \ + , GUIGFX_BASE_NAME) + +#define DrawPictureA(drawhandle, pic, x, y, tags) \ + LP5(0x72, BOOL, DrawPictureA, APTR, drawhandle, a0, APTR, pic, a1, UWORD, x, d0, UWORD, y, d1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define DrawPicture(drawhandle, pic, x, y, tags...) \ + ({ULONG _tags[] = {tags}; DrawPictureA((drawhandle), (pic), (x), (y), (struct TagItem *) _tags);}) +#endif + +#define MapPaletteA(drawhandle, palette, pentab, tags) \ + LP4(0x78, BOOL, MapPaletteA, APTR, drawhandle, a0, APTR, palette, a1, UBYTE *, pentab, a2, struct TagItem *, tags, a3, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define MapPalette(drawhandle, palette, pentab, tags...) \ + ({ULONG _tags[] = {tags}; MapPaletteA((drawhandle), (palette), (pentab), (struct TagItem *) _tags);}) +#endif + +#define MapPenA(drawhandle, rgb, tags) \ + LP3(0x7e, LONG, MapPenA, APTR, drawhandle, a0, ULONG, rgb, a1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define MapPen(drawhandle, rgb, tags...) \ + ({ULONG _tags[] = {tags}; MapPenA((drawhandle), (rgb), (struct TagItem *) _tags);}) +#endif + +#define CreatePictureBitMapA(drawhandle, pic, tags) \ + LP3(0x84, struct BitMap *, CreatePictureBitMapA, APTR, drawhandle, a0, APTR, pic, a1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define CreatePictureBitMap(drawhandle, pic, tags...) \ + ({ULONG _tags[] = {tags}; CreatePictureBitMapA((drawhandle), (pic), (struct TagItem *) _tags);}) +#endif + +#define DoPictureMethodA(pic, method, arguments) \ + LP3(0x8a, ULONG, DoPictureMethodA, APTR, pic, a0, ULONG, method, d0, ULONG *, arguments, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define DoPictureMethod(pic, method, tags...) \ + ({ULONG _tags[] = {tags}; DoPictureMethodA((pic), (method), (ULONG *) _tags);}) +#endif + +#define GetPictureAttrsA(pic, tags) \ + LP2(0x90, ULONG, GetPictureAttrsA, APTR, pic, a0, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define GetPictureAttrs(pic, tags...) \ + ({ULONG _tags[] = {tags}; GetPictureAttrsA((pic), (struct TagItem *) _tags);}) +#endif + +#define LockPictureA(pic, mode, args) \ + LP3(0x96, ULONG, LockPictureA, APTR, pic, a0, ULONG, mode, d0, ULONG *, args, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define LockPicture(pic, mode, tags...) \ + ({ULONG _tags[] = {tags}; LockPictureA((pic), (mode), (ULONG *) _tags);}) +#endif + +#define UnLockPicture(pic, mode) \ + LP2NR(0x9c, UnLockPicture, APTR, pic, a0, ULONG, mode, d0, \ + , GUIGFX_BASE_NAME) + +#define IsPictureA(filename, tags) \ + LP2(0xa2, BOOL, IsPictureA, char *, filename, a0, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define IsPicture(filename, tags...) \ + ({ULONG _tags[] = {tags}; IsPictureA((filename), (struct TagItem *) _tags);}) +#endif + +#define CreateDirectDrawHandleA(drawhandle, sw, sh, dw, dh, tags) \ + LP6(0xa8, APTR, CreateDirectDrawHandleA, APTR, drawhandle, a0, UWORD, sw, d0, UWORD, sh, d1, UWORD, dw, d2, UWORD, dh, d3, struct TagItem *, tags, a1, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define CreateDirectDrawHandle(drawhandle, sw, sh, dw, dh, tags...) \ + ({ULONG _tags[] = {tags}; CreateDirectDrawHandleA((drawhandle), (sw), (sh), (dw), (dh), (struct TagItem *) _tags);}) +#endif + +#define DeleteDirectDrawHandle(ddh) \ + LP1NR(0xae, DeleteDirectDrawHandle, APTR, ddh, a0, \ + , GUIGFX_BASE_NAME) + +#define DirectDrawTrueColorA(ddh, array, x, y, tags) \ + LP5(0xb4, BOOL, DirectDrawTrueColorA, APTR, ddh, a0, ULONG *, array, a1, UWORD, x, d0, UWORD, y, d1, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define DirectDrawTrueColor(ddh, array, x, y, tags...) \ + ({ULONG _tags[] = {tags}; DirectDrawTrueColorA((ddh), (array), (x), (y), (struct TagItem *) _tags);}) +#endif + +#define CreatePictureMaskA(pic, mask, maskwidth, tags) \ + LP4(0xba, BOOL, CreatePictureMaskA, APTR, pic, a0, UBYTE *, mask, a1, UWORD, maskwidth, d0, struct TagItem *, tags, a2, \ + , GUIGFX_BASE_NAME) + +#ifndef NO_INLINE_STDARG +#define CreatePictureMask(pic, mask, maskwidth, tags...) \ + ({ULONG _tags[] = {tags}; CreatePictureMaskA((pic), (mask), (maskwidth), (struct TagItem *) _tags);}) +#endif + +#endif /* _INLINE_GUIGFX_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/macros.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/macros.h new file mode 100644 index 0000000..2a07ae6 --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/macros.h @@ -0,0 +1,1749 @@ +#ifndef __INLINE_MACROS_H +#define __INLINE_MACROS_H + +/* + General macros for Amiga function calls. Not all the possibilities have + been created - only the ones which exist in OS 3.1. Third party libraries + and future versions of AmigaOS will maybe need some new ones... + + LPX - functions that take X arguments. + + Modifiers (variations are possible): + NR - no return (void), + A4, A5 - "a4" or "a5" is used as one of the arguments, + UB - base will be given explicitly by user (see cia.resource). + FP - one of the parameters has type "pointer to function". + FR - the return type is a "pointer to function". + + "bt" arguments are not used - they are provided for backward compatibility + only. +*/ + +#ifndef __INLINE_STUB_H +#include <inline/stubs.h> +#endif + +#define LP0(offs, rt, name, bt, bn) \ +({ \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP0FR(offs, rt, name, bt, bn, fpr) \ +({ \ + typedef fpr; \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP0NR(offs, name, bt, bn) \ +({ \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP1(offs, rt, name, t1, v1, r1, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP1FP(offs, rt, name, t1, v1, r1, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP1FR(offs, rt, name, t1, v1, r1, bt, bn, fpr) \ +({ \ + typedef fpr; \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP1FPFR(offs, rt, name, t1, v1, r1, bt, bn, fpt, fpr) \ +({ \ + typedef fpr; \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP1NR(offs, name, t1, v1, r1, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only graphics.library/AttemptLockLayerRom() */ +#define LP1A5(offs, rt, name, t1, v1, r1, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only graphics.library/LockLayerRom() and graphics.library/UnlockLayerRom() */ +#define LP1NRA5(offs, name, t1, v1, r1, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only exec.library/Supervisor() */ +#define LP1A5FP(offs, rt, name, t1, v1, r1, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP1NRFP(offs, name, t1, v1, r1, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP2(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP2NR(offs, name, t1, v1, r1, t2, v2, r2, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only cia.resource/AbleICR() and cia.resource/SetICR() */ +#define LP2UB(offs, rt, name, t1, v1, r1, t2, v2, r2) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only dos.library/InternalUnLoadSeg() */ +#define LP2FP(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP2FPFR(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt, fpr) \ +({ \ + typedef fpr; \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP2NRFP(offs, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only cia.resource/AddICRVector() */ +#define LP3UB(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only cia.resource/RemICRVector() */ +#define LP3NRUB(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only exec.library/SetFunction() */ +#define LP3FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP3FP2(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP3FP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2, fpt3) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + typedef fpt3; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only graphics.library/SetCollision() */ +#define LP3NRFP(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP3NRFP2(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP3NRFP3(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2, fpt3) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + typedef fpt3; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP4NRFP3(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt1, fpt2, fpt3) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + typedef fpt3; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only exec.library/RawDoFmt() */ +#define LP4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP4FP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt1, fpt2, fpt3, fpt4) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + typedef fpt3; \ + typedef fpt4; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP5NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + }; \ +}) + +#define LP5NRA5(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only exec.library/MakeLibrary() */ +#define LP5FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only reqtools.library/XXX() */ +#define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP5A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP6A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP6NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + }; \ +}) + +#define LP6FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP6A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP7(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP7NRFP6(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn, fpt1, fpt2, fpt3, fpt4, fpt5, fpt6) \ +({ \ + typedef fpt1; \ + typedef fpt2; \ + typedef fpt3; \ + typedef fpt4; \ + typedef fpt5; \ + typedef fpt6; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +/* Only workbench.library/AddAppIconA() */ +#define LP7A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP7A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn, fpt) \ +({ \ + typedef fpt; \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP7NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ + : "fp0", "fp1", "cc", "memory"); \ + }; \ +}) + +/* Would you believe that there really are beasts that need more than 7 + arguments? :-) */ + +/* For example intuition.library/AutoRequest() */ +#define LP8(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* For example intuition.library/ModifyProp() */ +#define LP8NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP8A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP8NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ + : "fp0", "fp1", "cc", "memory"); \ + }; \ +}) + +/* For example layers.library/CreateUpfrontHookLayer() */ +#define LP9(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* For example intuition.library/NewModifyProp() */ +#define LP9NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP9A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#define LP9NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ + : "fp0", "fp1", "cc", "memory"); \ + }; \ +}) + +/* Kriton Kyrimis <kyrimis(a)cti.gr> says CyberGraphics needs the following */ +#define LP10(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + t10 _##name##_v10 = (v10); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + register t10 _n10 __asm(#r10) = _##name##_v10; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only graphics.library/BltMaskBitMapRastPort() */ +#define LP10NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + t10 _##name##_v10 = (v10); \ + { \ + register int _d0 __asm("d0"); \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + register t10 _n10 __asm(#r10) = _##name##_v10; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ + : "fp0", "fp1", "cc", "memory"); \ + } \ +}) + +#define LP10A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + t10 _##name##_v10 = (v10); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + register t10 _n10 __asm(#r10) = _##name##_v10; \ + __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +/* Only graphics.library/BltBitMap() */ +#define LP11(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, t11, v11, r11, bt, bn) \ +({ \ + t1 _##name##_v1 = (v1); \ + t2 _##name##_v2 = (v2); \ + t3 _##name##_v3 = (v3); \ + t4 _##name##_v4 = (v4); \ + t5 _##name##_v5 = (v5); \ + t6 _##name##_v6 = (v6); \ + t7 _##name##_v7 = (v7); \ + t8 _##name##_v8 = (v8); \ + t9 _##name##_v9 = (v9); \ + t10 _##name##_v10 = (v10); \ + t11 _##name##_v11 = (v11); \ + rt _##name##_re2 = \ + ({ \ + register int _d1 __asm("d1"); \ + register int _a0 __asm("a0"); \ + register int _a1 __asm("a1"); \ + register rt _##name##_re __asm("d0"); \ + register void *const _##name##_bn __asm("a6") = (bn); \ + register t1 _n1 __asm(#r1) = _##name##_v1; \ + register t2 _n2 __asm(#r2) = _##name##_v2; \ + register t3 _n3 __asm(#r3) = _##name##_v3; \ + register t4 _n4 __asm(#r4) = _##name##_v4; \ + register t5 _n5 __asm(#r5) = _##name##_v5; \ + register t6 _n6 __asm(#r6) = _##name##_v6; \ + register t7 _n7 __asm(#r7) = _##name##_v7; \ + register t8 _n8 __asm(#r8) = _##name##_v8; \ + register t9 _n9 __asm(#r9) = _##name##_v9; \ + register t10 _n10 __asm(#r10) = _##name##_v10; \ + register t11 _n11 __asm(#r11) = _##name##_v11; \ + __asm volatile ("jsr a6@(-"#offs":W)" \ + : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ + : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10), "rf"(_n11) \ + : "fp0", "fp1", "cc", "memory"); \ + _##name##_re; \ + }); \ + _##name##_re2; \ +}) + +#endif /* __INLINE_MACROS_H */ + diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubbas.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubbas.h new file mode 100644 index 0000000..8b711db --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubbas.h @@ -0,0 +1,68 @@ +#ifndef _INLINE_MATHIEEEDOUBBAS_H +#define _INLINE_MATHIEEEDOUBBAS_H + +#ifndef CLIB_MATHIEEEDOUBBAS_PROTOS_H +#define CLIB_MATHIEEEDOUBBAS_PROTOS_H +#endif + +#ifndef __INLINE_MACROS_H +#include <inline/macros.h> +#endif + +#ifndef EXEC_TYPES_H +#include <exec/types.h> +#endif + +#ifndef MATHIEEEDOUBBAS_BASE_NAME +#define MATHIEEEDOUBBAS_BASE_NAME MathIeeeDoubBasBase +#endif + +#define IEEEDPFix(parm) \ + LP1(0x1e, LONG, IEEEDPFix, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPFlt(integer) \ + LP1(0x24, DOUBLE, IEEEDPFlt, LONG, integer, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPCmp(leftParm, rightParm) \ + LP2(0x2a, LONG, IEEEDPCmp, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPTst(parm) \ + LP1(0x30, LONG, IEEEDPTst, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPAbs(parm) \ + LP1(0x36, DOUBLE, IEEEDPAbs, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPNeg(parm) \ + LP1(0x3c, DOUBLE, IEEEDPNeg, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPAdd(leftParm, rightParm) \ + LP2(0x42, DOUBLE, IEEEDPAdd, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPSub(leftParm, rightParm) \ + LP2(0x48, DOUBLE, IEEEDPSub, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPMul(leftParm, rightParm) \ + LP2(0x4e, DOUBLE, IEEEDPMul, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPDiv(dividend, divisor) \ + LP2(0x54, DOUBLE, IEEEDPDiv, DOUBLE, dividend, d0, DOUBLE, divisor, d2, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPFloor(parm) \ + LP1(0x5a, DOUBLE, IEEEDPFloor, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#define IEEEDPCeil(parm) \ + LP1(0x60, DOUBLE, IEEEDPCeil, DOUBLE, parm, d0, \ + , MATHIEEEDOUBBAS_BASE_NAME) + +#endif /* _INLINE_MATHIEEEDOUBBAS_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubtrans.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubtrans.h new file mode 100644 index 0000000..0ccfa69 --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubtrans.h @@ -0,0 +1,88 @@ +#ifndef _INLINE_MATHIEEEDOUBTRANS_H +#define _INLINE_MATHIEEEDOUBTRANS_H + +#ifndef CLIB_MATHIEEEDOUBTRANS_PROTOS_H +#define CLIB_MATHIEEEDOUBTRANS_PROTOS_H +#endif + +#ifndef __INLINE_MACROS_H +#include <inline/macros.h> +#endif + +#ifndef EXEC_TYPES_H +#include <exec/types.h> +#endif + +#ifndef MATHIEEEDOUBTRANS_BASE_NAME +#define MATHIEEEDOUBTRANS_BASE_NAME MathIeeeDoubTransBase +#endif + +#define IEEEDPAtan(parm) \ + LP1(0x1e, DOUBLE, IEEEDPAtan, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPSin(parm) \ + LP1(0x24, DOUBLE, IEEEDPSin, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPCos(parm) \ + LP1(0x2a, DOUBLE, IEEEDPCos, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPTan(parm) \ + LP1(0x30, DOUBLE, IEEEDPTan, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPSincos(cosptr, parm) \ + LP2(0x36, DOUBLE, IEEEDPSincos, DOUBLE *, cosptr, a0, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPSinh(parm) \ + LP1(0x3c, DOUBLE, IEEEDPSinh, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPCosh(parm) \ + LP1(0x42, DOUBLE, IEEEDPCosh, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPTanh(parm) \ + LP1(0x48, DOUBLE, IEEEDPTanh, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPExp(parm) \ + LP1(0x4e, DOUBLE, IEEEDPExp, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPLog(parm) \ + LP1(0x54, DOUBLE, IEEEDPLog, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPPow(exp, arg) \ + LP2(0x5a, DOUBLE, IEEEDPPow, DOUBLE, exp, d2, DOUBLE, arg, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPSqrt(parm) \ + LP1(0x60, DOUBLE, IEEEDPSqrt, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPTieee(parm) \ + LP1(0x66, FLOAT, IEEEDPTieee, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPFieee(parm) \ + LP1(0x6c, DOUBLE, IEEEDPFieee, FLOAT, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPAsin(parm) \ + LP1(0x72, DOUBLE, IEEEDPAsin, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPAcos(parm) \ + LP1(0x78, DOUBLE, IEEEDPAcos, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#define IEEEDPLog10(parm) \ + LP1(0x7e, DOUBLE, IEEEDPLog10, DOUBLE, parm, d0, \ + , MATHIEEEDOUBTRANS_BASE_NAME) + +#endif /* _INLINE_MATHIEEEDOUBTRANS_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/libraries/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/libraries/Picasso96.h new file mode 100644 index 0000000..a9fcd49 --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/libraries/Picasso96.h @@ -0,0 +1,374 @@ +/* Picasso96.h -- include File + * (C) Copyright 1996-98 Alexander Kneer & Tobias Abt + * All Rights Reserved. + */ +/************************************************************************/ +#ifndef LIBRARIES_PICASSO96_H +#define LIBRARIES_PICASSO96_H +/************************************************************************/ +/* includes + */ +#ifndef EXEC_TYPES_H +#include <exec/types.h> +#endif + +#ifndef EXEC_NODES_H +#include <exec/nodes.h> +#endif + +#ifndef UTILITY_TAGITEM_H +#include <utility/tagitem.h> +#endif + +/************************************************************************/ +/* This is the name of the library + */ +#define P96NAME "Picasso96API.library" + +/************************************************************************/ +/* Types for RGBFormat used + */ +typedef enum { + RGBFB_NONE, /* no valid RGB format (should not happen) */ + RGBFB_CLUT, /* palette mode, set colors when opening screen using + tags or use SetRGB32/LoadRGB32(...) */ + RGBFB_R8G8B8, /* TrueColor RGB (8 bit each) */ + RGBFB_B8G8R8, /* TrueColor BGR (8 bit each) */ + RGBFB_R5G6B5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), + format: gggbbbbbrrrrrggg */ + RGBFB_R5G5B5PC, /* HiColor15 (5 bit each), format: gggbbbbb0rrrrrgg */ + RGBFB_A8R8G8B8, /* 4 Byte TrueColor ARGB (A unused alpha channel) */ + RGBFB_A8B8G8R8, /* 4 Byte TrueColor ABGR (A unused alpha channel) */ + RGBFB_R8G8B8A8, /* 4 Byte TrueColor RGBA (A unused alpha channel) */ + RGBFB_B8G8R8A8, /* 4 Byte TrueColor BGRA (A unused alpha channel) */ + RGBFB_R5G6B5, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), + format: rrrrrggggggbbbbb */ + RGBFB_R5G5B5, /* HiColor15 (5 bit each), format: 0rrrrrgggggbbbbb */ + RGBFB_B5G6R5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), + format: gggrrrrrbbbbbggg */ + RGBFB_B5G5R5PC, /* HiColor15 (5 bit each), format: gggrrrrr0bbbbbbgg */ + + /* By now, the following formats are for use with a hardware window only + (bitmap operations may be implemented incompletely) */ + + RGBFB_Y4U2V2, /* 2 Byte TrueColor YUV (CCIR recommendation CCIR601). + Each two-pixel unit is stored as one longword + containing luminance (Y) for each of the two pixels, + and chrominance (U,V) for alternate pixels. + The missing chrominance values are generated by + interpolation. (Y1-U0-Y0-V0) */ + RGBFB_Y4U1V1, /* 1 Byte TrueColor ACCUPAK. Four adjacent pixels form + a packet of 5 bits Y (luminance) each pixel and 6 bits + U and V (chrominance) shared by the four pixels */ + + RGBFB_MaxFormats + } RGBFTYPE; + +#define RGBFF_NONE (1<<RGBFB_NONE) +#define RGBFF_CLUT (1<<RGBFB_CLUT) +#define RGBFF_R8G8B8 (1<<RGBFB_R8G8B8) +#define RGBFF_B8G8R8 (1<<RGBFB_B8G8R8) +#define RGBFF_R5G6B5PC (1<<RGBFB_R5G6B5PC) +#define RGBFF_R5G5B5PC (1<<RGBFB_R5G5B5PC) +#define RGBFF_A8R8G8B8 (1<<RGBFB_A8R8G8B8) +#define RGBFF_A8B8G8R8 (1<<RGBFB_A8B8G8R8) +#define RGBFF_R8G8B8A8 (1<<RGBFB_R8G8B8A8) +#define RGBFF_B8G8R8A8 (1<<RGBFB_B8G8R8A8) +#define RGBFF_R5G6B5 (1<<RGBFB_R5G6B5) +#define RGBFF_R5G5B5 (1<<RGBFB_R5G5B5) +#define RGBFF_B5G6R5PC (1<<RGBFB_B5G6R5PC) +#define RGBFF_B5G5R5PC (1<<RGBFB_B5G5R5PC) +#define RGBFF_Y4U2V2 (1<<RGBFB_Y4U2V2) +#define RGBFF_Y4U1V1 (1<<RGBFB_Y4U1V1) + +#define RGBFF_HICOLOR (RGBFF_R5G6B5PC|RGBFF_R5G5B5PC|RGBFF_R5G6B5|RGBFF_R5G5B5|RGBFF_B5G6R5PC|RGBFF_B5G5R5PC) +#define RGBFF_TRUECOLOR (RGBFF_R8G8B8|RGBFF_B8G8R8) +#define RGBFF_TRUEALPHA (RGBFF_A8R8G8B8|RGBFF_A8B8G8R8|RGBFF_R8G8B8A8|RGBFF_B8G8R8A8) + +/************************************************************************/ +/* Flags for p96AllocBitMap + */ +#define BMF_USERPRIVATE (0x8000) /* private user bitmap that will never + be put to a board, but may be used as a temporary render buffer and accessed + with OS blit functions, too. Bitmaps allocated with this flag do not need to + be locked. */ + +/************************************************************************/ +/* Attributes for p96GetBitMapAttr + */ +enum { + P96BMA_WIDTH, + P96BMA_HEIGHT, + P96BMA_DEPTH, + P96BMA_MEMORY, + P96BMA_BYTESPERROW, + P96BMA_BYTESPERPIXEL, + P96BMA_BITSPERPIXEL, + P96BMA_RGBFORMAT, + P96BMA_ISP96, + P96BMA_ISONBOARD, + P96BMA_BOARDMEMBASE, + P96BMA_BOARDIOBASE, + P96BMA_BOARDMEMIOBASE +}; + +/************************************************************************/ +/* Attributes for p96GetModeIDAttr + */ +enum { + P96IDA_WIDTH, + P96IDA_HEIGHT, + P96IDA_DEPTH, + P96IDA_BYTESPERPIXEL, + P96IDA_BITSPERPIXEL, + P96IDA_RGBFORMAT, + P96IDA_ISP96, + P96IDA_BOARDNUMBER, + P96IDA_STDBYTESPERROW, + P96IDA_BOARDNAME, + P96IDA_COMPATIBLEFORMATS, + P96IDA_VIDEOCOMPATIBLE, + P96IDA_PABLOIVCOMPATIBLE, + P96IDA_PALOMAIVCOMPATIBLE +}; + +/************************************************************************/ +/* Tags for p96BestModeIDTagList + */ +#define P96BIDTAG_Dummy (TAG_USER + 96) + +#define P96BIDTAG_FormatsAllowed (P96BIDTAG_Dummy + 0x0001) +#define P96BIDTAG_FormatsForbidden (P96BIDTAG_Dummy + 0x0002) +#define P96BIDTAG_NominalWidth (P96BIDTAG_Dummy + 0x0003) +#define P96BIDTAG_NominalHeight (P96BIDTAG_Dummy + 0x0004) +#define P96BIDTAG_Depth (P96BIDTAG_Dummy + 0x0005) +#define P96BIDTAG_VideoCompatible (P96BIDTAG_Dummy + 0x0006) +#define P96BIDTAG_PabloIVCompatible (P96BIDTAG_Dummy + 0x0007) +#define P96BIDTAG_PalomaIVCompatible (P96BIDTAG_Dummy + 0x0008) + +/************************************************************************/ +/* Tags for p96RequestModeIDTagList + */ + +#define P96MA_Dummy (TAG_USER + 0x10000 + 96) + +#define P96MA_MinWidth (P96MA_Dummy + 0x0001) +#define P96MA_MinHeight (P96MA_Dummy + 0x0002) +#define P96MA_MinDepth (P96MA_Dummy + 0x0003) +#define P96MA_MaxWidth (P96MA_Dummy + 0x0004) +#define P96MA_MaxHeight (P96MA_Dummy + 0x0005) +#define P96MA_MaxDepth (P96MA_Dummy + 0x0006) +#define P96MA_DisplayID (P96MA_Dummy + 0x0007) +#define P96MA_FormatsAllowed (P96MA_Dummy + 0x0008) +#define P96MA_FormatsForbidden (P96MA_Dummy + 0x0009) +#define P96MA_WindowTitle (P96MA_Dummy + 0x000a) +#define P96MA_OKText (P96MA_Dummy + 0x000b) +#define P96MA_CancelText (P96MA_Dummy + 0x000c) +#define P96MA_Window (P96MA_Dummy + 0x000d) +#define P96MA_PubScreenName (P96MA_Dummy + 0x000e) +#define P96MA_Screen (P96MA_Dummy + 0x000f) +#define P96MA_VideoCompatible (P96MA_Dummy + 0x0010) +#define P96MA_PabloIVCompatible (P96MA_Dummy + 0x0011) +#define P96MA_PalomaIVCompatible (P96MA_Dummy + 0x0012) + +/************************************************************************/ +/* Tags for p96OpenScreenTagList + */ + +#define P96SA_Dummy (TAG_USER + 0x20000 + 96) +#define P96SA_Left (P96SA_Dummy + 0x0001) +#define P96SA_Top (P96SA_Dummy + 0x0002) +#define P96SA_Width (P96SA_Dummy + 0x0003) +#define P96SA_Height (P96SA_Dummy + 0x0004) +#define P96SA_Depth (P96SA_Dummy + 0x0005) +#define P96SA_DetailPen (P96SA_Dummy + 0x0006) +#define P96SA_BlockPen (P96SA_Dummy + 0x0007) +#define P96SA_Title (P96SA_Dummy + 0x0008) +#define P96SA_Colors (P96SA_Dummy + 0x0009) +#define P96SA_ErrorCode (P96SA_Dummy + 0x000a) +#define P96SA_Font (P96SA_Dummy + 0x000b) +#define P96SA_SysFont (P96SA_Dummy + 0x000c) +#define P96SA_Type (P96SA_Dummy + 0x000d) +#define P96SA_BitMap (P96SA_Dummy + 0x000e) +#define P96SA_PubName (P96SA_Dummy + 0x000f) +#define P96SA_PubSig (P96SA_Dummy + 0x0010) +#define P96SA_PubTask (P96SA_Dummy + 0x0011) +#define P96SA_DisplayID (P96SA_Dummy + 0x0012) +#define P96SA_DClip (P96SA_Dummy + 0x0013) +#define P96SA_ShowTitle (P96SA_Dummy + 0x0014) +#define P96SA_Behind (P96SA_Dummy + 0x0015) +#define P96SA_Quiet (P96SA_Dummy + 0x0016) +#define P96SA_AutoScroll (P96SA_Dummy + 0x0017) +#define P96SA_Pens (P96SA_Dummy + 0x0018) +#define P96SA_SharePens (P96SA_Dummy + 0x0019) +#define P96SA_BackFill (P96SA_Dummy + 0x001a) +#define P96SA_Colors32 (P96SA_Dummy + 0x001b) +#define P96SA_VideoControl (P96SA_Dummy + 0x001c) +#define P96SA_RGBFormat (P96SA_Dummy + 0x001d) +#define P96SA_NoSprite (P96SA_Dummy + 0x001e) +#define P96SA_NoMemory (P96SA_Dummy + 0x001f) +#define P96SA_RenderFunc (P96SA_Dummy + 0x0020) +#define P96SA_SaveFunc (P96SA_Dummy + 0x0021) +#define P96SA_UserData (P96SA_Dummy + 0x0022) +#define P96SA_Alignment (P96SA_Dummy + 0x0023) +#define P96SA_FixedScreen (P96SA_Dummy + 0x0024) +#define P96SA_Exclusive (P96SA_Dummy + 0x0025) +#define P96SA_ConstantBytesPerRow (P96SA_Dummy + 0x0026) + +/************************************************************************/ +/* + */ + +#define MODENAMELENGTH 48 + +struct P96Mode { + struct Node Node; + char Description[MODENAMELENGTH]; + UWORD Width; + UWORD Height; + UWORD Depth; + ULONG DisplayID; +}; + +/************************************************************************/ +/* Structure to describe graphics data + * + * short description of the entries: + * Memory: pointer to graphics data + * BytesPerRow: distance in bytes between one pixel and its neighbour up + * or down. + * pad: private, not used. + * RGBFormat: RGBFormat of the data. + */ + +struct RenderInfo { + APTR Memory; + WORD BytesPerRow; + WORD pad; + RGBFTYPE RGBFormat; +}; + +/************************************************************************/ +/* Structure for p96WriteTrueColorData() and p96ReadTrueColorData() + * + * short description of the entries: + * PixelDistance: distance in bytes between the red (must be the same as + * for the green or blue) component of one pixel and its + * next neighbour to the left or right. + * BytesPerRow: distance in bytes between the red (must be the same as + * for the green or blue) component of one pixel and its + * next neighbour up or down. + * RedData: pointer to the red component of the upper left pixel. + * GreenData, BlueData: the same as above. + * + * examples (for an array width of 640 pixels): + * a) separate arrays for each color: + * { 1, 640, red, green, blue }; + * b) plain 24 bit RGB data: + * { 3, 640*3, array, array+1, array+2 }; + * c) 24 bit data, arranged as ARGB: + * { 4, 640*4, array+1, array+2, array+3 }; + */ + +struct TrueColorInfo { + ULONG PixelDistance, BytesPerRow; + UBYTE *RedData, *GreenData, *BlueData; +}; + +/************************************************************************/ +/* Tags for PIPs + */ + +#define P96PIP_Dummy (TAG_USER + 0x30000 + 96) +#define P96PIP_SourceFormat (P96PIP_Dummy+1) /* RGBFTYPE (I) */ +#define P96PIP_SourceBitMap (P96PIP_Dummy+2) /* struct BitMap * (G) */ +#define P96PIP_SourceRPort (P96PIP_Dummy+3) /* struct RastPort * (G) */ +#define P96PIP_SourceWidth (P96PIP_Dummy+4) /* ULONG (I) */ +#define P96PIP_SourceHeight (P96PIP_Dummy+5) /* ULONG (I) */ +#define P96PIP_Type (P96PIP_Dummy+6) /* ULONG (I) default: PIPT_MemoryWindow */ +#define P96PIP_ErrorCode (P96PIP_Dummy+7) /* LONG* (I) */ +#define P96PIP_Brightness (P96PIP_Dummy+8) /* ULONG (IGS) default: 0 */ +#define P96PIP_Left (P96PIP_Dummy+9) /* ULONG (I) default: 0 */ +#define P96PIP_Top (P96PIP_Dummy+10) /* ULONG (I) default: 0 */ +#define P96PIP_Width (P96PIP_Dummy+11) /* ULONG (I) default: inner width of window */ +#define P96PIP_Height (P96PIP_Dummy+12) /* ULONG (I) default: inner height of window */ +#define P96PIP_Relativity (P96PIP_Dummy+13) /* ULONG (I) default: PIPRel_Width|PIPRel_Height */ +#define P96PIP_Colors (P96PIP_Dummy+14) /* struct ColorSpec * (IS) + * ti_Data is an array of struct ColorSpec, + * terminated by ColorIndex = -1. Specifies + * initial screen palette colors. + * Also see P96PIP_Colors32. + * This only works with CLUT PIPs on non-CLUT + * screens. For CLUT PIPs on CLUT screens the + * PIP colors share the screen palette. + */ +#define P96PIP_Colors32 (P96PIP_Dummy+15) /* ULONG* (IS) + * Tag to set the palette colors at 32 bits-per-gun. + * ti_Data is a pointer * to a table to be passed to + * the graphics.library/LoadRGB32() function. + * This format supports both runs of color + * registers and sparse registers. See the + * autodoc for that function for full details. + * Any color set here has precedence over + * the same register set by P96PIP_Colors. + * This only works with CLUT PIPs on non-CLUT + * screens. For CLUT PIPs on CLUT screens the + * PIP colors share the screen palette. + */ +#define P96PIP_NoMemory (P96PIP_Dummy+16) +#define P96PIP_RenderFunc (P96PIP_Dummy+17) +#define P96PIP_SaveFunc (P96PIP_Dummy+18) +#define P96PIP_UserData (P96PIP_Dummy+19) +#define P96PIP_Alignment (P96PIP_Dummy+20) +#define P96PIP_ConstantBytesPerRow (P96PIP_Dummy+21) +#define P96PIP_AllowCropping (P96PIP_Dummy+22) +#define P96PIP_InitialIntScaling (P96PIP_Dummy+23) + +enum { + PIPT_MemoryWindow, /* default */ + PIPT_VideoWindow, + PIPT_NUMTYPES +}; + +#define P96PIPT_MemoryWindow PIPT_MemoryWindow +#define P96PIPT_VideoWindow PIPT_VideoWindow + +#define PIPRel_Right 1 /* P96PIP_Left is relative to the right side (negative value) */ +#define PIPRel_Bottom 2 /* P96PIP_Top is relative to the bottom (negative value) */ +#define PIPRel_Width 4 /* P96PIP_Width is amount of pixels not used by PIP at the + right side of the window (negative value) */ +#define PIPRel_Height 8 /* P96PIP_Height is amount of pixels not used by PIP at the + window bottom (negative value) */ + +#define PIPERR_NOMEMORY (1) /* couldn't get normal memory */ +#define PIPERR_ATTACHFAIL (2) /* Failed to attach to a screen */ +#define PIPERR_NOTAVAILABLE (3) /* PIP not available for other reason */ +#define PIPERR_OUTOFPENS (4) /* couldn't get a free pen for occlusion */ +#define PIPERR_BADDIMENSIONS (5) /* type, width, height or format invalid */ +#define PIPERR_NOWINDOW (6) /* couldn't open window */ +#define PIPERR_BADALIGNMENT (7) /* specified alignment is not ok */ +#define PIPERR_CROPPED (8) /* pip would be cropped, but isn't allowed to */ +/************************************************************************/ +/* Tags for P96GetRTGDataTagList + */ + +#define P96RD_Dummy (TAG_USER + 0x40000 + 96) +#define P96RD_NumberOfBoards (P96RD_Dummy+1) + +/************************************************************************/ +/* Tags for P96GetBoardDataTagList + */ + +#define P96BD_Dummy (TAG_USER + 0x50000 + 96) +#define P96BD_BoardName (P96BD_Dummy+1) +#define P96BD_ChipName (P96BD_Dummy+2) +#define P96BD_TotalMemory (P96BD_Dummy+4) +#define P96BD_FreeMemory (P96BD_Dummy+5) +#define P96BD_LargestFreeMemory (P96BD_Dummy+6) +#define P96BD_MonitorSwitch (P96BD_Dummy+7) +#define P96BD_RGBFormats (P96BD_Dummy+8) +#define P96BD_MemoryClock (P96BD_Dummy+9) + +/************************************************************************/ +#endif +/************************************************************************/ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/Include_H/proto/Picasso96API.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/proto/Picasso96API.h new file mode 100644 index 0000000..8ba2f0c --- /dev/null +++ b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/proto/Picasso96API.h @@ -0,0 +1,26 @@ +#ifndef _PROTO_PICASSO96_H +#define _PROTO_PICASSO96_H + +#ifndef EXEC_TYPES_H +#include <exec/types.h> +#endif +#ifndef LIBRARIES_PICASSO96_H +#include <libraries/Picasso96.h> +#endif +#if !defined(CLIB_PICASSO96_PROTOS_H) && !defined(__GNUC__) +#include <clib/picasso96_protos.h> +#endif + +#ifndef __NOLIBBASE__ +extern struct Library *P96Base; +#endif + +#ifdef __GNUC__ +#include <inline/Picasso96.h> +#elif defined(__VBCC__) +#include <inline/picasso96_protos.h> +#else +#include <pragma/picasso96_lib.h> +#endif + +#endif /* _PROTO_PICASSO96_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/Picasso96.h deleted file mode 100644 index 74443cb..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/Picasso96.h +++ /dev/null @@ -1,171 +0,0 @@ -/* Automatically generated header! Do not edit! */ - -#ifndef _INLINE_PICASSO96API_H -#define _INLINE_PICASSO96API_H - -#ifndef __INLINE_MACROS_H -#include <inline/macros.h> -#endif /* !__INLINE_MACROS_H */ - -#ifndef PICASSO96API_BASE_NAME -#define PICASSO96API_BASE_NAME P96Base -#endif /* !PICASSO96API_BASE_NAME */ - -#define p96AllocBitMap(SizeX, SizeY, Depth, Flags, Friend, RGBFormat) \ - LP6(0x1e, struct BitMap *, p96AllocBitMap, ULONG, SizeX, d0, ULONG, SizeY, d1, ULONG, Depth, d2, ULONG, Flags, d3, struct BitMap *, Friend, a0, RGBFTYPE, RGBFormat, d7, \ - , PICASSO96API_BASE_NAME) - -#define p96AllocModeListTagList(Tags) \ - LP1(0x48, struct List *, p96AllocModeListTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96AllocModeListTags(tags...) \ - ({ULONG _tags[] = { tags }; p96AllocModeListTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96BestModeIDTagList(Tags) \ - LP1(0x3c, ULONG, p96BestModeIDTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96BestModeIDTags(tags...) \ - ({ULONG _tags[] = { tags }; p96BestModeIDTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96CloseScreen(Screen_) \ - LP1(0x60, BOOL, p96CloseScreen, struct Screen *, Screen_, a0, \ - , PICASSO96API_BASE_NAME) - -#define p96EncodeColor(RGBFormat, Color) \ - LP2(0xc0, ULONG, p96EncodeColor, RGBFTYPE, RGBFormat, d0, ULONG, Color, d1, \ - , PICASSO96API_BASE_NAME) - -#define p96FreeBitMap(BitMap_) \ - LP1NR(0x24, p96FreeBitMap, struct BitMap *, BitMap_, a0, \ - , PICASSO96API_BASE_NAME) - -#define p96FreeModeList(List_) \ - LP1NR(0x4e, p96FreeModeList, struct List *, List_, a0, \ - , PICASSO96API_BASE_NAME) - -#define p96GetBitMapAttr(BitMap_, Attribute) \ - LP2(0x2a, ULONG, p96GetBitMapAttr, struct BitMap *, BitMap_, a0, ULONG, Attribute, d0, \ - , PICASSO96API_BASE_NAME) - -#define p96GetBoardDataTagList(Board, Tags) \ - LP2(0xba, LONG, p96GetBoardDataTagList, ULONG, Board, d0, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96GetBoardDataTags(a0, tags...) \ - ({ULONG _tags[] = { tags }; p96GetBoardDataTagList((a0), (struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96GetModeIDAttr(Mode, Attribute) \ - LP2(0x54, ULONG, p96GetModeIDAttr, ULONG, Mode, d0, ULONG, Attribute, d1, \ - , PICASSO96API_BASE_NAME) - -#define p96GetRTGDataTagList(Tags) \ - LP1(0xb4, LONG, p96GetRTGDataTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96GetRTGDataTags(tags...) \ - ({ULONG _tags[] = { tags }; p96GetRTGDataTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96LockBitMap(BitMap_, Buffer, Size) \ - LP3(0x30, LONG, p96LockBitMap, struct BitMap *, BitMap_, a0, UBYTE *, Buffer, a1, ULONG, Size, d0, \ - , PICASSO96API_BASE_NAME) - -#define p96OpenScreenTagList(Tags) \ - LP1(0x5a, struct Screen *, p96OpenScreenTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96OpenScreenTags(tags...) \ - ({ULONG _tags[] = { tags }; p96OpenScreenTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96PIP_Close(Window_) \ - LP1(0x96, BOOL, p96PIP_Close, struct Window *, Window_, a0, \ - , PICASSO96API_BASE_NAME) - -#define p96PIP_GetIMsg(Port) \ - LP1(0xa8, struct IntuiMessage *, p96PIP_GetIMsg, struct MsgPort *, Port, a0, \ - , PICASSO96API_BASE_NAME) - -#define p96PIP_GetTagList(Window_, Tags) \ - LP2(0xa2, LONG, p96PIP_GetTagList, struct Window *, Window_, a0, struct TagItem *, Tags, a1, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96PIP_GetTags(a0, tags...) \ - ({ULONG _tags[] = { tags }; p96PIP_GetTagList((a0), (struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96PIP_OpenTagList(Tags) \ - LP1(0x90, struct Window *, p96PIP_OpenTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96PIP_OpenTags(tags...) \ - ({ULONG _tags[] = { tags }; p96PIP_OpenTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96PIP_ReplyIMsg(IntuiMessage_) \ - LP1NR(0xae, p96PIP_ReplyIMsg, struct IntuiMessage *, IntuiMessage_, a1, \ - , PICASSO96API_BASE_NAME) - -#define p96PIP_SetTagList(Window_, Tags) \ - LP2(0x9c, LONG, p96PIP_SetTagList, struct Window *, Window_, a0, struct TagItem *, Tags, a1, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96PIP_SetTags(a0, tags...) \ - ({ULONG _tags[] = { tags }; p96PIP_SetTagList((a0), (struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96ReadPixel(rp, x, y) \ - LP3(0x78, ULONG, p96ReadPixel, struct RastPort *, rp, a1, UWORD, x, d0, UWORD, y, d1, \ - , PICASSO96API_BASE_NAME) - -#define p96ReadPixelArray(ri, DestX, DestY, rp, SrcX, SrcY, SizeX, SizeY) \ - LP8NR(0x6c, p96ReadPixelArray, struct RenderInfo *, ri, a0, UWORD, DestX, d0, UWORD, DestY, d1, struct RastPort *, rp, a1, UWORD, SrcX, d2, UWORD, SrcY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ - , PICASSO96API_BASE_NAME) - -#define p96ReadTrueColorData(tci, DestX, DestY, rp, SrcX, SrcY, SizeX, SizeY) \ - LP8NR(0x8a, p96ReadTrueColorData, struct TrueColorInfo *, tci, a0, UWORD, DestX, d0, UWORD, DestY, d1, struct RastPort *, rp, a1, UWORD, SrcX, d2, UWORD, SrcY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ - , PICASSO96API_BASE_NAME) - -#define p96RectFill(rp, MinX, MinY, MaxX, MaxY, color) \ - LP6NR(0x7e, p96RectFill, struct RastPort *, rp, a1, UWORD, MinX, d0, UWORD, MinY, d1, UWORD, MaxX, d2, UWORD, MaxY, d3, ULONG, color, d4, \ - , PICASSO96API_BASE_NAME) - -#define p96RequestModeIDTagList(Tags) \ - LP1(0x42, ULONG, p96RequestModeIDTagList, struct TagItem *, Tags, a0, \ - , PICASSO96API_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define p96RequestModeIDTags(tags...) \ - ({ULONG _tags[] = { tags }; p96RequestModeIDTagList((struct TagItem *)_tags);}) -#endif /* !NO_INLINE_STDARG */ - -#define p96UnlockBitMap(BitMap_, Lock) \ - LP2NR(0x36, p96UnlockBitMap, struct BitMap *, BitMap_, a0, LONG, Lock, d0, \ - , PICASSO96API_BASE_NAME) - -#define p96WritePixel(rp, x, y, color) \ - LP4(0x72, ULONG, p96WritePixel, struct RastPort *, rp, a1, UWORD, x, d0, UWORD, y, d1, ULONG, color, d2, \ - , PICASSO96API_BASE_NAME) - -#define p96WritePixelArray(ri, SrcX, SrcY, rp, DestX, DestY, SizeX, SizeY) \ - LP8NR(0x66, p96WritePixelArray, struct RenderInfo *, ri, a0, UWORD, SrcX, d0, UWORD, SrcY, d1, struct RastPort *, rp, a1, UWORD, DestX, d2, UWORD, DestY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ - , PICASSO96API_BASE_NAME) - -#define p96WriteTrueColorData(tci, SrcX, SrcY, rp, DestX, DestY, SizeX, SizeY) \ - LP8NR(0x84, p96WriteTrueColorData, struct TrueColorInfo *, tci, a0, UWORD, SrcX, d0, UWORD, SrcY, d1, struct RastPort *, rp, a1, UWORD, DestX, d2, UWORD, DestY, d3, UWORD, SizeX, d4, UWORD, SizeY, d5, \ - , PICASSO96API_BASE_NAME) - -#endif /* !_INLINE_PICASSO96API_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/guigfx.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/guigfx.h deleted file mode 100644 index a12650a..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/guigfx.h +++ /dev/null @@ -1,224 +0,0 @@ -#ifndef _INLINE_GUIGFX_H -#define _INLINE_GUIGFX_H - -#ifndef CLIB_GUIGFX_PROTOS_H -#define CLIB_GUIGFX_PROTOS_H -#endif - -#ifndef __INLINE_MACROS_H -#include <inline/macros.h> -#endif - -#ifndef EXEC_TYPES_H -#include <exec/types.h> -#endif - -#ifndef GUIGFX_BASE_NAME -#define GUIGFX_BASE_NAME GuiGFXBase -#endif - -#define MakePictureA(array, width, height, tags) \ - LP4(0x1e, APTR, MakePictureA, APTR, array, a0, UWORD, width, d0, UWORD, height, d1, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define MakePicture(array, width, height, tags...) \ - ({ULONG _tags[] = {tags}; MakePictureA((array), (width), (height), (struct TagItem *) _tags);}) -#endif - -#define LoadPictureA(filename, tags) \ - LP2(0x24, APTR, LoadPictureA, STRPTR, filename, a0, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define LoadPicture(filename, tags...) \ - ({ULONG _tags[] = {tags}; LoadPictureA((filename), (struct TagItem *) _tags);}) -#endif - -#define ReadPictureA(a0arg, colormap, x, y, width, height, tags) \ - LP7(0x2a, APTR, ReadPictureA, struct RastPort *, a0arg, a0, struct ColorMap *, colormap, a1, UWORD, x, d0, UWORD, y, d1, UWORD, width, d2, UWORD, height, d3, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define ReadPicture(a0arg, colormap, x, y, width, height, tags...) \ - ({ULONG _tags[] = {tags}; ReadPictureA((a0arg), (colormap), (x), (y), (width), (height), (struct TagItem *) _tags);}) -#endif - -#define ClonePictureA(pic, tags) \ - LP2(0x30, APTR, ClonePictureA, APTR, pic, a0, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define ClonePicture(pic, tags...) \ - ({ULONG _tags[] = {tags}; ClonePictureA((pic), (struct TagItem *) _tags);}) -#endif - -#define DeletePicture(pic) \ - LP1NR(0x36, DeletePicture, APTR, pic, a0, \ - , GUIGFX_BASE_NAME) - -#define AddPictureA(psm, pic, tags) \ - LP3(0x42, APTR, AddPictureA, APTR, psm, a0, APTR, pic, a1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define AddPicture(psm, pic, tags...) \ - ({ULONG _tags[] = {tags}; AddPictureA((psm), (pic), (struct TagItem *) _tags);}) -#endif - -#define AddPaletteA(psm, palette, tags) \ - LP3(0x48, APTR, AddPaletteA, APTR, psm, a0, APTR, palette, a1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define AddPalette(psm, palette, tags...) \ - ({ULONG _tags[] = {tags}; AddPaletteA((psm), (palette), (struct TagItem *) _tags);}) -#endif - -#define AddPixelArrayA(psm, array, width, height, tags) \ - LP5(0x4e, APTR, AddPixelArrayA, APTR, psm, a0, APTR, array, a1, UWORD, width, d0, UWORD, height, d1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define AddPixelArray(psm, array, width, height, tags...) \ - ({ULONG _tags[] = {tags}; AddPixelArrayA((psm), (array), (width), (height), (struct TagItem *) _tags);}) -#endif - -#define RemColorHandle(colorhandle) \ - LP1NR(0x54, RemColorHandle, APTR, colorhandle, a0, \ - , GUIGFX_BASE_NAME) - -#define CreatePenShareMapA(tags) \ - LP1(0x5a, APTR, CreatePenShareMapA, struct TagItem *, tags, a0, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define CreatePenShareMap(tags...) \ - ({ULONG _tags[] = {tags}; CreatePenShareMapA((struct TagItem *) _tags);}) -#endif - -#define DeletePenShareMap(psm) \ - LP1NR(0x60, DeletePenShareMap, APTR, psm, a0, \ - , GUIGFX_BASE_NAME) - -#define ObtainDrawHandleA(psm, a1arg, cm, tags) \ - LP4(0x66, APTR, ObtainDrawHandleA, APTR, psm, a0, struct RastPort *, a1arg, a1, struct ColorMap *, cm, a2, struct TagItem *, tags, a3, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define ObtainDrawHandle(psm, a1arg, cm, tags...) \ - ({ULONG _tags[] = {tags}; ObtainDrawHandleA((psm), (a1arg), (cm), (struct TagItem *) _tags);}) -#endif - -#define ReleaseDrawHandle(drawhandle) \ - LP1NR(0x6c, ReleaseDrawHandle, APTR, drawhandle, a0, \ - , GUIGFX_BASE_NAME) - -#define DrawPictureA(drawhandle, pic, x, y, tags) \ - LP5(0x72, BOOL, DrawPictureA, APTR, drawhandle, a0, APTR, pic, a1, UWORD, x, d0, UWORD, y, d1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define DrawPicture(drawhandle, pic, x, y, tags...) \ - ({ULONG _tags[] = {tags}; DrawPictureA((drawhandle), (pic), (x), (y), (struct TagItem *) _tags);}) -#endif - -#define MapPaletteA(drawhandle, palette, pentab, tags) \ - LP4(0x78, BOOL, MapPaletteA, APTR, drawhandle, a0, APTR, palette, a1, UBYTE *, pentab, a2, struct TagItem *, tags, a3, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define MapPalette(drawhandle, palette, pentab, tags...) \ - ({ULONG _tags[] = {tags}; MapPaletteA((drawhandle), (palette), (pentab), (struct TagItem *) _tags);}) -#endif - -#define MapPenA(drawhandle, rgb, tags) \ - LP3(0x7e, LONG, MapPenA, APTR, drawhandle, a0, ULONG, rgb, a1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define MapPen(drawhandle, rgb, tags...) \ - ({ULONG _tags[] = {tags}; MapPenA((drawhandle), (rgb), (struct TagItem *) _tags);}) -#endif - -#define CreatePictureBitMapA(drawhandle, pic, tags) \ - LP3(0x84, struct BitMap *, CreatePictureBitMapA, APTR, drawhandle, a0, APTR, pic, a1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define CreatePictureBitMap(drawhandle, pic, tags...) \ - ({ULONG _tags[] = {tags}; CreatePictureBitMapA((drawhandle), (pic), (struct TagItem *) _tags);}) -#endif - -#define DoPictureMethodA(pic, method, arguments) \ - LP3(0x8a, ULONG, DoPictureMethodA, APTR, pic, a0, ULONG, method, d0, ULONG *, arguments, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define DoPictureMethod(pic, method, tags...) \ - ({ULONG _tags[] = {tags}; DoPictureMethodA((pic), (method), (ULONG *) _tags);}) -#endif - -#define GetPictureAttrsA(pic, tags) \ - LP2(0x90, ULONG, GetPictureAttrsA, APTR, pic, a0, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define GetPictureAttrs(pic, tags...) \ - ({ULONG _tags[] = {tags}; GetPictureAttrsA((pic), (struct TagItem *) _tags);}) -#endif - -#define LockPictureA(pic, mode, args) \ - LP3(0x96, ULONG, LockPictureA, APTR, pic, a0, ULONG, mode, d0, ULONG *, args, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define LockPicture(pic, mode, tags...) \ - ({ULONG _tags[] = {tags}; LockPictureA((pic), (mode), (ULONG *) _tags);}) -#endif - -#define UnLockPicture(pic, mode) \ - LP2NR(0x9c, UnLockPicture, APTR, pic, a0, ULONG, mode, d0, \ - , GUIGFX_BASE_NAME) - -#define IsPictureA(filename, tags) \ - LP2(0xa2, BOOL, IsPictureA, char *, filename, a0, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define IsPicture(filename, tags...) \ - ({ULONG _tags[] = {tags}; IsPictureA((filename), (struct TagItem *) _tags);}) -#endif - -#define CreateDirectDrawHandleA(drawhandle, sw, sh, dw, dh, tags) \ - LP6(0xa8, APTR, CreateDirectDrawHandleA, APTR, drawhandle, a0, UWORD, sw, d0, UWORD, sh, d1, UWORD, dw, d2, UWORD, dh, d3, struct TagItem *, tags, a1, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define CreateDirectDrawHandle(drawhandle, sw, sh, dw, dh, tags...) \ - ({ULONG _tags[] = {tags}; CreateDirectDrawHandleA((drawhandle), (sw), (sh), (dw), (dh), (struct TagItem *) _tags);}) -#endif - -#define DeleteDirectDrawHandle(ddh) \ - LP1NR(0xae, DeleteDirectDrawHandle, APTR, ddh, a0, \ - , GUIGFX_BASE_NAME) - -#define DirectDrawTrueColorA(ddh, array, x, y, tags) \ - LP5(0xb4, BOOL, DirectDrawTrueColorA, APTR, ddh, a0, ULONG *, array, a1, UWORD, x, d0, UWORD, y, d1, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define DirectDrawTrueColor(ddh, array, x, y, tags...) \ - ({ULONG _tags[] = {tags}; DirectDrawTrueColorA((ddh), (array), (x), (y), (struct TagItem *) _tags);}) -#endif - -#define CreatePictureMaskA(pic, mask, maskwidth, tags) \ - LP4(0xba, BOOL, CreatePictureMaskA, APTR, pic, a0, UBYTE *, mask, a1, UWORD, maskwidth, d0, struct TagItem *, tags, a2, \ - , GUIGFX_BASE_NAME) - -#ifndef NO_INLINE_STDARG -#define CreatePictureMask(pic, mask, maskwidth, tags...) \ - ({ULONG _tags[] = {tags}; CreatePictureMaskA((pic), (mask), (maskwidth), (struct TagItem *) _tags);}) -#endif - -#endif /* _INLINE_GUIGFX_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/macros.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/macros.h deleted file mode 100644 index 2a07ae6..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/macros.h +++ /dev/null @@ -1,1749 +0,0 @@ -#ifndef __INLINE_MACROS_H -#define __INLINE_MACROS_H - -/* - General macros for Amiga function calls. Not all the possibilities have - been created - only the ones which exist in OS 3.1. Third party libraries - and future versions of AmigaOS will maybe need some new ones... - - LPX - functions that take X arguments. - - Modifiers (variations are possible): - NR - no return (void), - A4, A5 - "a4" or "a5" is used as one of the arguments, - UB - base will be given explicitly by user (see cia.resource). - FP - one of the parameters has type "pointer to function". - FR - the return type is a "pointer to function". - - "bt" arguments are not used - they are provided for backward compatibility - only. -*/ - -#ifndef __INLINE_STUB_H -#include <inline/stubs.h> -#endif - -#define LP0(offs, rt, name, bt, bn) \ -({ \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP0FR(offs, rt, name, bt, bn, fpr) \ -({ \ - typedef fpr; \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP0NR(offs, name, bt, bn) \ -({ \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP1(offs, rt, name, t1, v1, r1, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP1FP(offs, rt, name, t1, v1, r1, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP1FR(offs, rt, name, t1, v1, r1, bt, bn, fpr) \ -({ \ - typedef fpr; \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP1FPFR(offs, rt, name, t1, v1, r1, bt, bn, fpt, fpr) \ -({ \ - typedef fpr; \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP1NR(offs, name, t1, v1, r1, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only graphics.library/AttemptLockLayerRom() */ -#define LP1A5(offs, rt, name, t1, v1, r1, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only graphics.library/LockLayerRom() and graphics.library/UnlockLayerRom() */ -#define LP1NRA5(offs, name, t1, v1, r1, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only exec.library/Supervisor() */ -#define LP1A5FP(offs, rt, name, t1, v1, r1, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP1NRFP(offs, name, t1, v1, r1, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP2(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP2NR(offs, name, t1, v1, r1, t2, v2, r2, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only cia.resource/AbleICR() and cia.resource/SetICR() */ -#define LP2UB(offs, rt, name, t1, v1, r1, t2, v2, r2) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only dos.library/InternalUnLoadSeg() */ -#define LP2FP(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP2FPFR(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt, fpr) \ -({ \ - typedef fpr; \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP2NRFP(offs, name, t1, v1, r1, t2, v2, r2, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only cia.resource/AddICRVector() */ -#define LP3UB(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only cia.resource/RemICRVector() */ -#define LP3NRUB(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only exec.library/SetFunction() */ -#define LP3FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP3FP2(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP3FP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2, fpt3) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - typedef fpt3; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only graphics.library/SetCollision() */ -#define LP3NRFP(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP3NRFP2(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP3NRFP3(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt1, fpt2, fpt3) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - typedef fpt3; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP4NRFP3(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt1, fpt2, fpt3) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - typedef fpt3; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only exec.library/RawDoFmt() */ -#define LP4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP4FP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt1, fpt2, fpt3, fpt4) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - typedef fpt3; \ - typedef fpt4; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP5NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - }; \ -}) - -#define LP5NRA5(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only exec.library/MakeLibrary() */ -#define LP5FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only reqtools.library/XXX() */ -#define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP5A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP6A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP6NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - }; \ -}) - -#define LP6FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP6A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP7(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP7NRFP6(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn, fpt1, fpt2, fpt3, fpt4, fpt5, fpt6) \ -({ \ - typedef fpt1; \ - typedef fpt2; \ - typedef fpt3; \ - typedef fpt4; \ - typedef fpt5; \ - typedef fpt6; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -/* Only workbench.library/AddAppIconA() */ -#define LP7A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP7A4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn, fpt) \ -({ \ - typedef fpt; \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP7NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \ - : "fp0", "fp1", "cc", "memory"); \ - }; \ -}) - -/* Would you believe that there really are beasts that need more than 7 - arguments? :-) */ - -/* For example intuition.library/AutoRequest() */ -#define LP8(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* For example intuition.library/ModifyProp() */ -#define LP8NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP8A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP8NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \ - : "fp0", "fp1", "cc", "memory"); \ - }; \ -}) - -/* For example layers.library/CreateUpfrontHookLayer() */ -#define LP9(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* For example intuition.library/NewModifyProp() */ -#define LP9NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP9A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#define LP9NRA4(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \ - : "fp0", "fp1", "cc", "memory"); \ - }; \ -}) - -/* Kriton Kyrimis <kyrimis(a)cti.gr> says CyberGraphics needs the following */ -#define LP10(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - t10 _##name##_v10 = (v10); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - register t10 _n10 __asm(#r10) = _##name##_v10; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only graphics.library/BltMaskBitMapRastPort() */ -#define LP10NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - t10 _##name##_v10 = (v10); \ - { \ - register int _d0 __asm("d0"); \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - register t10 _n10 __asm(#r10) = _##name##_v10; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ - : "fp0", "fp1", "cc", "memory"); \ - } \ -}) - -#define LP10A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - t10 _##name##_v10 = (v10); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - register t10 _n10 __asm(#r10) = _##name##_v10; \ - __asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -/* Only graphics.library/BltBitMap() */ -#define LP11(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, t11, v11, r11, bt, bn) \ -({ \ - t1 _##name##_v1 = (v1); \ - t2 _##name##_v2 = (v2); \ - t3 _##name##_v3 = (v3); \ - t4 _##name##_v4 = (v4); \ - t5 _##name##_v5 = (v5); \ - t6 _##name##_v6 = (v6); \ - t7 _##name##_v7 = (v7); \ - t8 _##name##_v8 = (v8); \ - t9 _##name##_v9 = (v9); \ - t10 _##name##_v10 = (v10); \ - t11 _##name##_v11 = (v11); \ - rt _##name##_re2 = \ - ({ \ - register int _d1 __asm("d1"); \ - register int _a0 __asm("a0"); \ - register int _a1 __asm("a1"); \ - register rt _##name##_re __asm("d0"); \ - register void *const _##name##_bn __asm("a6") = (bn); \ - register t1 _n1 __asm(#r1) = _##name##_v1; \ - register t2 _n2 __asm(#r2) = _##name##_v2; \ - register t3 _n3 __asm(#r3) = _##name##_v3; \ - register t4 _n4 __asm(#r4) = _##name##_v4; \ - register t5 _n5 __asm(#r5) = _##name##_v5; \ - register t6 _n6 __asm(#r6) = _##name##_v6; \ - register t7 _n7 __asm(#r7) = _##name##_v7; \ - register t8 _n8 __asm(#r8) = _##name##_v8; \ - register t9 _n9 __asm(#r9) = _##name##_v9; \ - register t10 _n10 __asm(#r10) = _##name##_v10; \ - register t11 _n11 __asm(#r11) = _##name##_v11; \ - __asm volatile ("jsr a6@(-"#offs":W)" \ - : "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \ - : "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10), "rf"(_n11) \ - : "fp0", "fp1", "cc", "memory"); \ - _##name##_re; \ - }); \ - _##name##_re2; \ -}) - -#endif /* __INLINE_MACROS_H */ - diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubbas.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubbas.h deleted file mode 100644 index 8b711db..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubbas.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef _INLINE_MATHIEEEDOUBBAS_H -#define _INLINE_MATHIEEEDOUBBAS_H - -#ifndef CLIB_MATHIEEEDOUBBAS_PROTOS_H -#define CLIB_MATHIEEEDOUBBAS_PROTOS_H -#endif - -#ifndef __INLINE_MACROS_H -#include <inline/macros.h> -#endif - -#ifndef EXEC_TYPES_H -#include <exec/types.h> -#endif - -#ifndef MATHIEEEDOUBBAS_BASE_NAME -#define MATHIEEEDOUBBAS_BASE_NAME MathIeeeDoubBasBase -#endif - -#define IEEEDPFix(parm) \ - LP1(0x1e, LONG, IEEEDPFix, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPFlt(integer) \ - LP1(0x24, DOUBLE, IEEEDPFlt, LONG, integer, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPCmp(leftParm, rightParm) \ - LP2(0x2a, LONG, IEEEDPCmp, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPTst(parm) \ - LP1(0x30, LONG, IEEEDPTst, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPAbs(parm) \ - LP1(0x36, DOUBLE, IEEEDPAbs, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPNeg(parm) \ - LP1(0x3c, DOUBLE, IEEEDPNeg, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPAdd(leftParm, rightParm) \ - LP2(0x42, DOUBLE, IEEEDPAdd, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPSub(leftParm, rightParm) \ - LP2(0x48, DOUBLE, IEEEDPSub, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPMul(leftParm, rightParm) \ - LP2(0x4e, DOUBLE, IEEEDPMul, DOUBLE, leftParm, d0, DOUBLE, rightParm, d2, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPDiv(dividend, divisor) \ - LP2(0x54, DOUBLE, IEEEDPDiv, DOUBLE, dividend, d0, DOUBLE, divisor, d2, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPFloor(parm) \ - LP1(0x5a, DOUBLE, IEEEDPFloor, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#define IEEEDPCeil(parm) \ - LP1(0x60, DOUBLE, IEEEDPCeil, DOUBLE, parm, d0, \ - , MATHIEEEDOUBBAS_BASE_NAME) - -#endif /* _INLINE_MATHIEEEDOUBBAS_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubtrans.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubtrans.h deleted file mode 100644 index 0ccfa69..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubtrans.h +++ /dev/null @@ -1,88 +0,0 @@ -#ifndef _INLINE_MATHIEEEDOUBTRANS_H -#define _INLINE_MATHIEEEDOUBTRANS_H - -#ifndef CLIB_MATHIEEEDOUBTRANS_PROTOS_H -#define CLIB_MATHIEEEDOUBTRANS_PROTOS_H -#endif - -#ifndef __INLINE_MACROS_H -#include <inline/macros.h> -#endif - -#ifndef EXEC_TYPES_H -#include <exec/types.h> -#endif - -#ifndef MATHIEEEDOUBTRANS_BASE_NAME -#define MATHIEEEDOUBTRANS_BASE_NAME MathIeeeDoubTransBase -#endif - -#define IEEEDPAtan(parm) \ - LP1(0x1e, DOUBLE, IEEEDPAtan, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPSin(parm) \ - LP1(0x24, DOUBLE, IEEEDPSin, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPCos(parm) \ - LP1(0x2a, DOUBLE, IEEEDPCos, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPTan(parm) \ - LP1(0x30, DOUBLE, IEEEDPTan, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPSincos(cosptr, parm) \ - LP2(0x36, DOUBLE, IEEEDPSincos, DOUBLE *, cosptr, a0, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPSinh(parm) \ - LP1(0x3c, DOUBLE, IEEEDPSinh, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPCosh(parm) \ - LP1(0x42, DOUBLE, IEEEDPCosh, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPTanh(parm) \ - LP1(0x48, DOUBLE, IEEEDPTanh, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPExp(parm) \ - LP1(0x4e, DOUBLE, IEEEDPExp, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPLog(parm) \ - LP1(0x54, DOUBLE, IEEEDPLog, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPPow(exp, arg) \ - LP2(0x5a, DOUBLE, IEEEDPPow, DOUBLE, exp, d2, DOUBLE, arg, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPSqrt(parm) \ - LP1(0x60, DOUBLE, IEEEDPSqrt, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPTieee(parm) \ - LP1(0x66, FLOAT, IEEEDPTieee, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPFieee(parm) \ - LP1(0x6c, DOUBLE, IEEEDPFieee, FLOAT, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPAsin(parm) \ - LP1(0x72, DOUBLE, IEEEDPAsin, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPAcos(parm) \ - LP1(0x78, DOUBLE, IEEEDPAcos, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#define IEEEDPLog10(parm) \ - LP1(0x7e, DOUBLE, IEEEDPLog10, DOUBLE, parm, d0, \ - , MATHIEEEDOUBTRANS_BASE_NAME) - -#endif /* _INLINE_MATHIEEEDOUBTRANS_H */ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/libraries/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/libraries/Picasso96.h deleted file mode 100644 index a9fcd49..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/libraries/Picasso96.h +++ /dev/null @@ -1,374 +0,0 @@ -/* Picasso96.h -- include File - * (C) Copyright 1996-98 Alexander Kneer & Tobias Abt - * All Rights Reserved. - */ -/************************************************************************/ -#ifndef LIBRARIES_PICASSO96_H -#define LIBRARIES_PICASSO96_H -/************************************************************************/ -/* includes - */ -#ifndef EXEC_TYPES_H -#include <exec/types.h> -#endif - -#ifndef EXEC_NODES_H -#include <exec/nodes.h> -#endif - -#ifndef UTILITY_TAGITEM_H -#include <utility/tagitem.h> -#endif - -/************************************************************************/ -/* This is the name of the library - */ -#define P96NAME "Picasso96API.library" - -/************************************************************************/ -/* Types for RGBFormat used - */ -typedef enum { - RGBFB_NONE, /* no valid RGB format (should not happen) */ - RGBFB_CLUT, /* palette mode, set colors when opening screen using - tags or use SetRGB32/LoadRGB32(...) */ - RGBFB_R8G8B8, /* TrueColor RGB (8 bit each) */ - RGBFB_B8G8R8, /* TrueColor BGR (8 bit each) */ - RGBFB_R5G6B5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), - format: gggbbbbbrrrrrggg */ - RGBFB_R5G5B5PC, /* HiColor15 (5 bit each), format: gggbbbbb0rrrrrgg */ - RGBFB_A8R8G8B8, /* 4 Byte TrueColor ARGB (A unused alpha channel) */ - RGBFB_A8B8G8R8, /* 4 Byte TrueColor ABGR (A unused alpha channel) */ - RGBFB_R8G8B8A8, /* 4 Byte TrueColor RGBA (A unused alpha channel) */ - RGBFB_B8G8R8A8, /* 4 Byte TrueColor BGRA (A unused alpha channel) */ - RGBFB_R5G6B5, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), - format: rrrrrggggggbbbbb */ - RGBFB_R5G5B5, /* HiColor15 (5 bit each), format: 0rrrrrgggggbbbbb */ - RGBFB_B5G6R5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), - format: gggrrrrrbbbbbggg */ - RGBFB_B5G5R5PC, /* HiColor15 (5 bit each), format: gggrrrrr0bbbbbbgg */ - - /* By now, the following formats are for use with a hardware window only - (bitmap operations may be implemented incompletely) */ - - RGBFB_Y4U2V2, /* 2 Byte TrueColor YUV (CCIR recommendation CCIR601). - Each two-pixel unit is stored as one longword - containing luminance (Y) for each of the two pixels, - and chrominance (U,V) for alternate pixels. - The missing chrominance values are generated by - interpolation. (Y1-U0-Y0-V0) */ - RGBFB_Y4U1V1, /* 1 Byte TrueColor ACCUPAK. Four adjacent pixels form - a packet of 5 bits Y (luminance) each pixel and 6 bits - U and V (chrominance) shared by the four pixels */ - - RGBFB_MaxFormats - } RGBFTYPE; - -#define RGBFF_NONE (1<<RGBFB_NONE) -#define RGBFF_CLUT (1<<RGBFB_CLUT) -#define RGBFF_R8G8B8 (1<<RGBFB_R8G8B8) -#define RGBFF_B8G8R8 (1<<RGBFB_B8G8R8) -#define RGBFF_R5G6B5PC (1<<RGBFB_R5G6B5PC) -#define RGBFF_R5G5B5PC (1<<RGBFB_R5G5B5PC) -#define RGBFF_A8R8G8B8 (1<<RGBFB_A8R8G8B8) -#define RGBFF_A8B8G8R8 (1<<RGBFB_A8B8G8R8) -#define RGBFF_R8G8B8A8 (1<<RGBFB_R8G8B8A8) -#define RGBFF_B8G8R8A8 (1<<RGBFB_B8G8R8A8) -#define RGBFF_R5G6B5 (1<<RGBFB_R5G6B5) -#define RGBFF_R5G5B5 (1<<RGBFB_R5G5B5) -#define RGBFF_B5G6R5PC (1<<RGBFB_B5G6R5PC) -#define RGBFF_B5G5R5PC (1<<RGBFB_B5G5R5PC) -#define RGBFF_Y4U2V2 (1<<RGBFB_Y4U2V2) -#define RGBFF_Y4U1V1 (1<<RGBFB_Y4U1V1) - -#define RGBFF_HICOLOR (RGBFF_R5G6B5PC|RGBFF_R5G5B5PC|RGBFF_R5G6B5|RGBFF_R5G5B5|RGBFF_B5G6R5PC|RGBFF_B5G5R5PC) -#define RGBFF_TRUECOLOR (RGBFF_R8G8B8|RGBFF_B8G8R8) -#define RGBFF_TRUEALPHA (RGBFF_A8R8G8B8|RGBFF_A8B8G8R8|RGBFF_R8G8B8A8|RGBFF_B8G8R8A8) - -/************************************************************************/ -/* Flags for p96AllocBitMap - */ -#define BMF_USERPRIVATE (0x8000) /* private user bitmap that will never - be put to a board, but may be used as a temporary render buffer and accessed - with OS blit functions, too. Bitmaps allocated with this flag do not need to - be locked. */ - -/************************************************************************/ -/* Attributes for p96GetBitMapAttr - */ -enum { - P96BMA_WIDTH, - P96BMA_HEIGHT, - P96BMA_DEPTH, - P96BMA_MEMORY, - P96BMA_BYTESPERROW, - P96BMA_BYTESPERPIXEL, - P96BMA_BITSPERPIXEL, - P96BMA_RGBFORMAT, - P96BMA_ISP96, - P96BMA_ISONBOARD, - P96BMA_BOARDMEMBASE, - P96BMA_BOARDIOBASE, - P96BMA_BOARDMEMIOBASE -}; - -/************************************************************************/ -/* Attributes for p96GetModeIDAttr - */ -enum { - P96IDA_WIDTH, - P96IDA_HEIGHT, - P96IDA_DEPTH, - P96IDA_BYTESPERPIXEL, - P96IDA_BITSPERPIXEL, - P96IDA_RGBFORMAT, - P96IDA_ISP96, - P96IDA_BOARDNUMBER, - P96IDA_STDBYTESPERROW, - P96IDA_BOARDNAME, - P96IDA_COMPATIBLEFORMATS, - P96IDA_VIDEOCOMPATIBLE, - P96IDA_PABLOIVCOMPATIBLE, - P96IDA_PALOMAIVCOMPATIBLE -}; - -/************************************************************************/ -/* Tags for p96BestModeIDTagList - */ -#define P96BIDTAG_Dummy (TAG_USER + 96) - -#define P96BIDTAG_FormatsAllowed (P96BIDTAG_Dummy + 0x0001) -#define P96BIDTAG_FormatsForbidden (P96BIDTAG_Dummy + 0x0002) -#define P96BIDTAG_NominalWidth (P96BIDTAG_Dummy + 0x0003) -#define P96BIDTAG_NominalHeight (P96BIDTAG_Dummy + 0x0004) -#define P96BIDTAG_Depth (P96BIDTAG_Dummy + 0x0005) -#define P96BIDTAG_VideoCompatible (P96BIDTAG_Dummy + 0x0006) -#define P96BIDTAG_PabloIVCompatible (P96BIDTAG_Dummy + 0x0007) -#define P96BIDTAG_PalomaIVCompatible (P96BIDTAG_Dummy + 0x0008) - -/************************************************************************/ -/* Tags for p96RequestModeIDTagList - */ - -#define P96MA_Dummy (TAG_USER + 0x10000 + 96) - -#define P96MA_MinWidth (P96MA_Dummy + 0x0001) -#define P96MA_MinHeight (P96MA_Dummy + 0x0002) -#define P96MA_MinDepth (P96MA_Dummy + 0x0003) -#define P96MA_MaxWidth (P96MA_Dummy + 0x0004) -#define P96MA_MaxHeight (P96MA_Dummy + 0x0005) -#define P96MA_MaxDepth (P96MA_Dummy + 0x0006) -#define P96MA_DisplayID (P96MA_Dummy + 0x0007) -#define P96MA_FormatsAllowed (P96MA_Dummy + 0x0008) -#define P96MA_FormatsForbidden (P96MA_Dummy + 0x0009) -#define P96MA_WindowTitle (P96MA_Dummy + 0x000a) -#define P96MA_OKText (P96MA_Dummy + 0x000b) -#define P96MA_CancelText (P96MA_Dummy + 0x000c) -#define P96MA_Window (P96MA_Dummy + 0x000d) -#define P96MA_PubScreenName (P96MA_Dummy + 0x000e) -#define P96MA_Screen (P96MA_Dummy + 0x000f) -#define P96MA_VideoCompatible (P96MA_Dummy + 0x0010) -#define P96MA_PabloIVCompatible (P96MA_Dummy + 0x0011) -#define P96MA_PalomaIVCompatible (P96MA_Dummy + 0x0012) - -/************************************************************************/ -/* Tags for p96OpenScreenTagList - */ - -#define P96SA_Dummy (TAG_USER + 0x20000 + 96) -#define P96SA_Left (P96SA_Dummy + 0x0001) -#define P96SA_Top (P96SA_Dummy + 0x0002) -#define P96SA_Width (P96SA_Dummy + 0x0003) -#define P96SA_Height (P96SA_Dummy + 0x0004) -#define P96SA_Depth (P96SA_Dummy + 0x0005) -#define P96SA_DetailPen (P96SA_Dummy + 0x0006) -#define P96SA_BlockPen (P96SA_Dummy + 0x0007) -#define P96SA_Title (P96SA_Dummy + 0x0008) -#define P96SA_Colors (P96SA_Dummy + 0x0009) -#define P96SA_ErrorCode (P96SA_Dummy + 0x000a) -#define P96SA_Font (P96SA_Dummy + 0x000b) -#define P96SA_SysFont (P96SA_Dummy + 0x000c) -#define P96SA_Type (P96SA_Dummy + 0x000d) -#define P96SA_BitMap (P96SA_Dummy + 0x000e) -#define P96SA_PubName (P96SA_Dummy + 0x000f) -#define P96SA_PubSig (P96SA_Dummy + 0x0010) -#define P96SA_PubTask (P96SA_Dummy + 0x0011) -#define P96SA_DisplayID (P96SA_Dummy + 0x0012) -#define P96SA_DClip (P96SA_Dummy + 0x0013) -#define P96SA_ShowTitle (P96SA_Dummy + 0x0014) -#define P96SA_Behind (P96SA_Dummy + 0x0015) -#define P96SA_Quiet (P96SA_Dummy + 0x0016) -#define P96SA_AutoScroll (P96SA_Dummy + 0x0017) -#define P96SA_Pens (P96SA_Dummy + 0x0018) -#define P96SA_SharePens (P96SA_Dummy + 0x0019) -#define P96SA_BackFill (P96SA_Dummy + 0x001a) -#define P96SA_Colors32 (P96SA_Dummy + 0x001b) -#define P96SA_VideoControl (P96SA_Dummy + 0x001c) -#define P96SA_RGBFormat (P96SA_Dummy + 0x001d) -#define P96SA_NoSprite (P96SA_Dummy + 0x001e) -#define P96SA_NoMemory (P96SA_Dummy + 0x001f) -#define P96SA_RenderFunc (P96SA_Dummy + 0x0020) -#define P96SA_SaveFunc (P96SA_Dummy + 0x0021) -#define P96SA_UserData (P96SA_Dummy + 0x0022) -#define P96SA_Alignment (P96SA_Dummy + 0x0023) -#define P96SA_FixedScreen (P96SA_Dummy + 0x0024) -#define P96SA_Exclusive (P96SA_Dummy + 0x0025) -#define P96SA_ConstantBytesPerRow (P96SA_Dummy + 0x0026) - -/************************************************************************/ -/* - */ - -#define MODENAMELENGTH 48 - -struct P96Mode { - struct Node Node; - char Description[MODENAMELENGTH]; - UWORD Width; - UWORD Height; - UWORD Depth; - ULONG DisplayID; -}; - -/************************************************************************/ -/* Structure to describe graphics data - * - * short description of the entries: - * Memory: pointer to graphics data - * BytesPerRow: distance in bytes between one pixel and its neighbour up - * or down. - * pad: private, not used. - * RGBFormat: RGBFormat of the data. - */ - -struct RenderInfo { - APTR Memory; - WORD BytesPerRow; - WORD pad; - RGBFTYPE RGBFormat; -}; - -/************************************************************************/ -/* Structure for p96WriteTrueColorData() and p96ReadTrueColorData() - * - * short description of the entries: - * PixelDistance: distance in bytes between the red (must be the same as - * for the green or blue) component of one pixel and its - * next neighbour to the left or right. - * BytesPerRow: distance in bytes between the red (must be the same as - * for the green or blue) component of one pixel and its - * next neighbour up or down. - * RedData: pointer to the red component of the upper left pixel. - * GreenData, BlueData: the same as above. - * - * examples (for an array width of 640 pixels): - * a) separate arrays for each color: - * { 1, 640, red, green, blue }; - * b) plain 24 bit RGB data: - * { 3, 640*3, array, array+1, array+2 }; - * c) 24 bit data, arranged as ARGB: - * { 4, 640*4, array+1, array+2, array+3 }; - */ - -struct TrueColorInfo { - ULONG PixelDistance, BytesPerRow; - UBYTE *RedData, *GreenData, *BlueData; -}; - -/************************************************************************/ -/* Tags for PIPs - */ - -#define P96PIP_Dummy (TAG_USER + 0x30000 + 96) -#define P96PIP_SourceFormat (P96PIP_Dummy+1) /* RGBFTYPE (I) */ -#define P96PIP_SourceBitMap (P96PIP_Dummy+2) /* struct BitMap * (G) */ -#define P96PIP_SourceRPort (P96PIP_Dummy+3) /* struct RastPort * (G) */ -#define P96PIP_SourceWidth (P96PIP_Dummy+4) /* ULONG (I) */ -#define P96PIP_SourceHeight (P96PIP_Dummy+5) /* ULONG (I) */ -#define P96PIP_Type (P96PIP_Dummy+6) /* ULONG (I) default: PIPT_MemoryWindow */ -#define P96PIP_ErrorCode (P96PIP_Dummy+7) /* LONG* (I) */ -#define P96PIP_Brightness (P96PIP_Dummy+8) /* ULONG (IGS) default: 0 */ -#define P96PIP_Left (P96PIP_Dummy+9) /* ULONG (I) default: 0 */ -#define P96PIP_Top (P96PIP_Dummy+10) /* ULONG (I) default: 0 */ -#define P96PIP_Width (P96PIP_Dummy+11) /* ULONG (I) default: inner width of window */ -#define P96PIP_Height (P96PIP_Dummy+12) /* ULONG (I) default: inner height of window */ -#define P96PIP_Relativity (P96PIP_Dummy+13) /* ULONG (I) default: PIPRel_Width|PIPRel_Height */ -#define P96PIP_Colors (P96PIP_Dummy+14) /* struct ColorSpec * (IS) - * ti_Data is an array of struct ColorSpec, - * terminated by ColorIndex = -1. Specifies - * initial screen palette colors. - * Also see P96PIP_Colors32. - * This only works with CLUT PIPs on non-CLUT - * screens. For CLUT PIPs on CLUT screens the - * PIP colors share the screen palette. - */ -#define P96PIP_Colors32 (P96PIP_Dummy+15) /* ULONG* (IS) - * Tag to set the palette colors at 32 bits-per-gun. - * ti_Data is a pointer * to a table to be passed to - * the graphics.library/LoadRGB32() function. - * This format supports both runs of color - * registers and sparse registers. See the - * autodoc for that function for full details. - * Any color set here has precedence over - * the same register set by P96PIP_Colors. - * This only works with CLUT PIPs on non-CLUT - * screens. For CLUT PIPs on CLUT screens the - * PIP colors share the screen palette. - */ -#define P96PIP_NoMemory (P96PIP_Dummy+16) -#define P96PIP_RenderFunc (P96PIP_Dummy+17) -#define P96PIP_SaveFunc (P96PIP_Dummy+18) -#define P96PIP_UserData (P96PIP_Dummy+19) -#define P96PIP_Alignment (P96PIP_Dummy+20) -#define P96PIP_ConstantBytesPerRow (P96PIP_Dummy+21) -#define P96PIP_AllowCropping (P96PIP_Dummy+22) -#define P96PIP_InitialIntScaling (P96PIP_Dummy+23) - -enum { - PIPT_MemoryWindow, /* default */ - PIPT_VideoWindow, - PIPT_NUMTYPES -}; - -#define P96PIPT_MemoryWindow PIPT_MemoryWindow -#define P96PIPT_VideoWindow PIPT_VideoWindow - -#define PIPRel_Right 1 /* P96PIP_Left is relative to the right side (negative value) */ -#define PIPRel_Bottom 2 /* P96PIP_Top is relative to the bottom (negative value) */ -#define PIPRel_Width 4 /* P96PIP_Width is amount of pixels not used by PIP at the - right side of the window (negative value) */ -#define PIPRel_Height 8 /* P96PIP_Height is amount of pixels not used by PIP at the - window bottom (negative value) */ - -#define PIPERR_NOMEMORY (1) /* couldn't get normal memory */ -#define PIPERR_ATTACHFAIL (2) /* Failed to attach to a screen */ -#define PIPERR_NOTAVAILABLE (3) /* PIP not available for other reason */ -#define PIPERR_OUTOFPENS (4) /* couldn't get a free pen for occlusion */ -#define PIPERR_BADDIMENSIONS (5) /* type, width, height or format invalid */ -#define PIPERR_NOWINDOW (6) /* couldn't open window */ -#define PIPERR_BADALIGNMENT (7) /* specified alignment is not ok */ -#define PIPERR_CROPPED (8) /* pip would be cropped, but isn't allowed to */ -/************************************************************************/ -/* Tags for P96GetRTGDataTagList - */ - -#define P96RD_Dummy (TAG_USER + 0x40000 + 96) -#define P96RD_NumberOfBoards (P96RD_Dummy+1) - -/************************************************************************/ -/* Tags for P96GetBoardDataTagList - */ - -#define P96BD_Dummy (TAG_USER + 0x50000 + 96) -#define P96BD_BoardName (P96BD_Dummy+1) -#define P96BD_ChipName (P96BD_Dummy+2) -#define P96BD_TotalMemory (P96BD_Dummy+4) -#define P96BD_FreeMemory (P96BD_Dummy+5) -#define P96BD_LargestFreeMemory (P96BD_Dummy+6) -#define P96BD_MonitorSwitch (P96BD_Dummy+7) -#define P96BD_RGBFormats (P96BD_Dummy+8) -#define P96BD_MemoryClock (P96BD_Dummy+9) - -/************************************************************************/ -#endif -/************************************************************************/ diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/proto/Picasso96API.h b/m68k-unknown-amigaos/recipes/files/ndk/sys-include/proto/Picasso96API.h deleted file mode 100644 index 8ba2f0c..0000000 --- a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/proto/Picasso96API.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _PROTO_PICASSO96_H -#define _PROTO_PICASSO96_H - -#ifndef EXEC_TYPES_H -#include <exec/types.h> -#endif -#ifndef LIBRARIES_PICASSO96_H -#include <libraries/Picasso96.h> -#endif -#if !defined(CLIB_PICASSO96_PROTOS_H) && !defined(__GNUC__) -#include <clib/picasso96_protos.h> -#endif - -#ifndef __NOLIBBASE__ -extern struct Library *P96Base; -#endif - -#ifdef __GNUC__ -#include <inline/Picasso96.h> -#elif defined(__VBCC__) -#include <inline/picasso96_protos.h> -#else -#include <pragma/picasso96_lib.h> -#endif - -#endif /* _PROTO_PICASSO96_H */ diff --git a/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p b/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p deleted file mode 100644 index c322504..0000000 --- a/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p +++ /dev/null @@ -1,11 +0,0 @@ ---- sys-include/inline/intuition.h 2006-05-10 18:29:23.000000000 +0100 -+++ sys-include/inline/intuition.h 2016-02-29 00:06:48.824015807 +0000 -@@ -448,7 +448,7 @@ - LP3(0x27c, APTR, NewObjectA, struct IClass *, classPtr, a0, CONST_STRPTR, classID, a1, const struct TagItem *, tagList, a2, \ - , INTUITION_BASE_NAME) - --#ifndef NO_INLINE_STDARG -+#if 0 - __inline APTR NewObject(struct IClass * classPtr, CONST_STRPTR classID, ULONG tagList, ...) - { - return NewObjectA(classPtr, classID, (const struct TagItem *) &tagList); ----------------------------------------------------------------------- Summary of changes: m68k-unknown-amigaos/Makefile | 3 +++ .../files/ndk/{sys-include => Include_H}/inline/Picasso96.h | 0 .../files/ndk/{sys-include => Include_H}/inline/guigfx.h | 0 .../files/ndk/{sys-include => Include_H}/inline/macros.h | 0 .../ndk/{sys-include => Include_H}/inline/mathieeedoubbas.h | 0 .../{sys-include => Include_H}/inline/mathieeedoubtrans.h | 0 .../ndk/{sys-include => Include_H}/libraries/Picasso96.h | 0 .../ndk/{sys-include => Include_H}/proto/Picasso96API.h | 0 .../recipes/patches/ndk/ndk.inline.intuition.h.p | 11 ----------- 9 files changed, 3 insertions(+), 11 deletions(-) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/inline/Picasso96.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/inline/guigfx.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/inline/macros.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/inline/mathieeedoubbas.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/inline/mathieeedoubtrans.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/libraries/Picasso96.h (100%) rename m68k-unknown-amigaos/recipes/files/ndk/{sys-include => Include_H}/proto/Picasso96API.h (100%) delete mode 100644 m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p diff --git a/m68k-unknown-amigaos/Makefile b/m68k-unknown-amigaos/Makefile index 7d0e0ea..df1f4bd 100644 --- a/m68k-unknown-amigaos/Makefile +++ b/m68k-unknown-amigaos/Makefile @@ -127,6 +127,9 @@ $(BUILDSTEPS)/clib2-src.d: $(SOURCESDIR)/$(UPSTREAM_CLIB2_TARBALL) $(BUILDSTEPS)/ndk.d: $(SOURCESDIR)/$(UPSTREAM_NDK_TARBALL) $(SOURCESDIR)/$(UPSTREAM_OPENURL_TARBALL) $(SOURCESDIR)/$(UPSTREAM_GUIGFX_TARBALL) $(SOURCESDIR)/$(UPSTREAM_RENDER_TARBALL) $(SOURCESDIR)/$(UPSTREAM_CODESETS_TARBALL) $(SOURCESDIR)/$(UPSTREAM_AMISSL_TARBALL) mkdir -p $(BUILDDIR)/ndk lha xw=$(BUILDDIR)/ndk $(SOURCESDIR)/$(UPSTREAM_NDK_TARBALL) + for p in `ls $(RECIPES)/patches/ndk/*.p` ; do patch -d $(BUILDDIR)/ndk -p0 <$$p || exit $0 ; done + for dir in `find $(RECIPES)/files/ndk/ -type d | grep -v '\.svn' | sed 's#$(RECIPES)/files/ndk##'` ; do mkdir -p $(BUILDDIR)/ndk/NDK3.2$$dir ; done + for file in `find $(RECIPES)/files/ndk/ -type f | grep -v '\.svn' | sed 's#$(RECIPES)/files/ndk##'` ; do cp -p $(RECIPES)/files/ndk$$file $(BUILDDIR)/ndk/NDK3.2$$file ; done mkdir -p $(PREFIX)/$(TARGET_NAME)/sys-include cp -r $(BUILDDIR)/ndk/NDK3.2/Include_H/* $(PREFIX)/$(TARGET_NAME)/sys-include mkdir -p $(BUILDDIR)/openurl diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/Picasso96.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/Picasso96.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/Picasso96.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/guigfx.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/guigfx.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/guigfx.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/guigfx.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/macros.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/macros.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/macros.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/macros.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubbas.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubbas.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubbas.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubbas.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubtrans.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubtrans.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/inline/mathieeedoubtrans.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/inline/mathieeedoubtrans.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/libraries/Picasso96.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/libraries/Picasso96.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/libraries/Picasso96.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/libraries/Picasso96.h diff --git a/m68k-unknown-amigaos/recipes/files/ndk/sys-include/proto/Picasso96API.h b/m68k-unknown-amigaos/recipes/files/ndk/Include_H/proto/Picasso96API.h similarity index 100% rename from m68k-unknown-amigaos/recipes/files/ndk/sys-include/proto/Picasso96API.h rename to m68k-unknown-amigaos/recipes/files/ndk/Include_H/proto/Picasso96API.h diff --git a/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p b/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p deleted file mode 100644 index c322504..0000000 --- a/m68k-unknown-amigaos/recipes/patches/ndk/ndk.inline.intuition.h.p +++ /dev/null @@ -1,11 +0,0 @@ ---- sys-include/inline/intuition.h 2006-05-10 18:29:23.000000000 +0100 -+++ sys-include/inline/intuition.h 2016-02-29 00:06:48.824015807 +0000 -@@ -448,7 +448,7 @@ - LP3(0x27c, APTR, NewObjectA, struct IClass *, classPtr, a0, CONST_STRPTR, classID, a1, const struct TagItem *, tagList, a2, \ - , INTUITION_BASE_NAME) - --#ifndef NO_INLINE_STDARG -+#if 0 - __inline APTR NewObject(struct IClass * classPtr, CONST_STRPTR classID, ULONG tagList, ...) - { - return NewObjectA(classPtr, classID, (const struct TagItem *) &tagList); -- Cross-compilation toolchains and environments

1 year, 8 months

1
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0 / 0

netsurf: branch chris/ndk32 created. release/3.10-155-g1770a8d

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/netsurf.git/shortlog/1770a8d9b621c53717ddf... ...commit http://git.netsurf-browser.org/netsurf.git/commit/1770a8d9b621c53717ddf02... ...tree http://git.netsurf-browser.org/netsurf.git/tree/1770a8d9b621c53717ddf026e... The branch, chris/ndk32 has been created at 1770a8d9b621c53717ddf026e2314d2693321d8a (commit) - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=1770a8d9b621c53717d... commit 1770a8d9b621c53717ddf026e2314d2693321d8a Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: squash warning diff --git a/frontends/amiga/arexx.c b/frontends/amiga/arexx.c index 243e927..f937fdb 100644 --- a/frontends/amiga/arexx.c +++ b/frontends/amiga/arexx.c @@ -709,7 +709,7 @@ RXHOOKF(rx_slabstats) #ifndef __amigaos4__ BPTR fh = 0; - if(cmd->ac_ArgList[0] != NULL) { + if(cmd->ac_ArgList[0]) { fh = Open((char *)cmd->ac_ArgList[0], MODE_NEWFILE); } ami_memory_slab_dump(fh); commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=3b040870ab03aeb9622... commit 3b040870ab03aeb962229619a7925d6bd4dc0daa Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: remove OS3.9 compatibility code diff --git a/frontends/amiga/os3support.c b/frontends/amiga/os3support.c index 98843c7..63037da 100644 --- a/frontends/amiga/os3support.c +++ b/frontends/amiga/os3support.c @@ -431,9 +431,5 @@ ULONG RefreshSetGadgetAttrs(struct Gadget *g, struct Window *w, struct Requester return RefreshSetGadgetAttrsA(g,w,r,(struct TagItem *) &tag1); } -APTR NewObject(struct IClass * classPtr, CONST_STRPTR classID, ULONG tagList, ...) -{ - return NewObjectA(classPtr, classID, (const struct TagItem *) &tagList); -} #endif diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index 8d9fd2f..f511012 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -143,9 +143,6 @@ /* application */ #define Notify(...) (void)0 -/* DataTypes */ -#define SaveDTObjectA(O,W,R,F,M,I,A) DoDTMethod(O,W,R,DTM_WRITE,F,M,NULL) - /* diskfont */ #define EReleaseInfo ReleaseInfo #define EObtainInfo ObtainInfo @@ -238,7 +235,6 @@ struct Node *GetSucc(struct Node *node); uint32 GetAttrs(Object *obj, Tag tag1, ...); ULONG RefreshSetGadgetAttrs(struct Gadget *g, struct Window *w, struct Requester *r, Tag tag1, ...); ULONG RefreshSetGadgetAttrsA(struct Gadget *g, struct Window *w, struct Requester *r, struct TagItem *tags); -APTR NewObject(struct IClass * classPtr, CONST_STRPTR classID, ULONG tagList, ...); /* Utility */ char *ASPrintf(const char *fmt, ...); commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=d182987b4a304bbccf5... commit d182987b4a304bbccf57bbae159215ef4fbced27 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: squash warnings diff --git a/frontends/amiga/agclass/amigaguide_class.c b/frontends/amiga/agclass/amigaguide_class.c index 2b80223..f2790a3 100644 --- a/frontends/amiga/agclass/amigaguide_class.c +++ b/frontends/amiga/agclass/amigaguide_class.c @@ -299,7 +299,7 @@ uint32 agm_open(Class *cl, Object *o, Msg msg) if ( lod->agHandle ) agm_close(cl, o, msg); // (Re)establish the AmigaGuide context and open the database asynchronously. - if ( (lod->agHandle = OpenAmigaGuideAsync(&(lod->nag), NULL)) ) + if ( (lod->agHandle = OpenAmigaGuideAsyncA(&(lod->nag), NULL)) ) { if ( (lod->agSignal = AmigaGuideSignal(lod->agHandle)) ) { @@ -321,8 +321,8 @@ uint32 agm_open(Class *cl, Object *o, Msg msg) if ( lod->nag.nag_Context ) { // A context node array is provided = open the current context node. - SetAmigaGuideContext(lod->agHandle, lod->agContextID, NULL); - retVal = SendAmigaGuideContext(lod->agHandle, NULL); + SetAmigaGuideContextA(lod->agHandle, lod->agContextID, NULL); + retVal = SendAmigaGuideContextA(lod->agHandle, NULL); } else { commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=7da6db12c67583c372a... commit 7da6db12c67583c372ac0cd33cb80bc0afabda62 Author: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Commit: Chris Young <chris(a)unsatisfactorysoftware.co.uk> Amiga: start removing compatibility code which is no longer needed under 3.2 diff --git a/frontends/amiga/os3support.h b/frontends/amiga/os3support.h index dc4e065..8d9fd2f 100644 --- a/frontends/amiga/os3support.h +++ b/frontends/amiga/os3support.h @@ -35,6 +35,9 @@ /* Include prototypes for amigalib */ #include <clib/alib_protos.h> +#include <graphics/gfx.h> /* struct Rectangle */ +#include <intuition/intuition.h> /* struct Gadget, Window, Requester */ + #ifndef EXEC_MEMORY_H #include <exec/memory.h> #endif @@ -118,8 +121,6 @@ /* Other constants */ #define BVS_DISPLAY BVS_NONE -#define IDCMP_EXTENDEDMOUSE 0 -#define WINDOW_BACKMOST 0 #define DN_FULLPATH 0 #define BGBACKFILL JAM1 #define OFF_OPEN 0 @@ -169,11 +170,9 @@ #define IDoMethod DoMethod #define IDoMethodA DoMethodA #define IDoSuperMethodA DoSuperMethodA -#define ShowWindow(...) (void)0 /* Utility */ #define SetMem memset -#define SNPrintf snprintf /* Integral type definitions */ typedef int8_t int8; @@ -185,18 +184,6 @@ typedef uint32_t uint32; typedef int64_t int64; typedef uint64_t uint64; -/* TimeVal */ -struct TimeVal { - uint32 Seconds; - uint32 Microseconds; -}; - -/* TimeRequest */ -struct TimeRequest { - struct IORequest Request; - struct TimeVal Time; -}; - /* OutlineFont */ struct OutlineFont { struct BulletBase *BulletBase; ----------------------------------------------------------------------- -- NetSurf Browser

1 year, 8 months

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netsurf: branch master updated. release/3.10-151-g251cce2

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/netsurf.git/shortlog/251cce29b775967f756ee... ...commit http://git.netsurf-browser.org/netsurf.git/commit/251cce29b775967f756ee12... ...tree http://git.netsurf-browser.org/netsurf.git/tree/251cce29b775967f756ee1294... The branch, master has been updated via 251cce29b775967f756ee1294f27aeb5499cf0d9 (commit) from 5a6bb392184decd72779ea93c4e0ecc492b3d77f (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/netsurf.git/commit/?id=251cce29b775967f756... commit 251cce29b775967f756ee1294f27aeb5499cf0d9 Author: Michael Drake <tlsa(a)netsurf-browser.org> Commit: Michael Drake <tlsa(a)netsurf-browser.org> CSS: Selection callbacks: Update to latest LibDOM API. diff --git a/content/handlers/css/select.c b/content/handlers/css/select.c index 6dc1d9b..c77644b 100644 --- a/content/handlers/css/select.c +++ b/content/handlers/css/select.c @@ -473,6 +473,7 @@ css_error named_ancestor_node(void *pw, void *node, { dom_element_named_ancestor_node(node, qname->name, (struct dom_element **)ancestor); + dom_node_unref(*ancestor); return CSS_OK; } @@ -493,6 +494,7 @@ css_error named_parent_node(void *pw, void *node, { dom_element_named_parent_node(node, qname->name, (struct dom_element **)parent); + dom_node_unref(*parent); return CSS_OK; } @@ -642,6 +644,7 @@ css_error named_generic_sibling_node(void *pw, void *node, css_error parent_node(void *pw, void *node, void **parent) { dom_element_parent_node(node, (struct dom_element **)parent); + dom_node_unref(*parent); return CSS_OK; } ----------------------------------------------------------------------- Summary of changes: content/handlers/css/select.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/content/handlers/css/select.c b/content/handlers/css/select.c index 6dc1d9b..c77644b 100644 --- a/content/handlers/css/select.c +++ b/content/handlers/css/select.c @@ -473,6 +473,7 @@ css_error named_ancestor_node(void *pw, void *node, { dom_element_named_ancestor_node(node, qname->name, (struct dom_element **)ancestor); + dom_node_unref(*ancestor); return CSS_OK; } @@ -493,6 +494,7 @@ css_error named_parent_node(void *pw, void *node, { dom_element_named_parent_node(node, qname->name, (struct dom_element **)parent); + dom_node_unref(*parent); return CSS_OK; } @@ -642,6 +644,7 @@ css_error named_generic_sibling_node(void *pw, void *node, css_error parent_node(void *pw, void *node, void **parent) { dom_element_parent_node(node, (struct dom_element **)parent); + dom_node_unref(*parent); return CSS_OK; } -- NetSurf Browser

1 year, 8 months

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libdom: branch master updated. release/0.4.1-17-g631f016

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/libdom.git/shortlog/631f016a9ccff344f4dcb0... ...commit http://git.netsurf-browser.org/libdom.git/commit/631f016a9ccff344f4dcb0b5... ...tree http://git.netsurf-browser.org/libdom.git/tree/631f016a9ccff344f4dcb0b57e... The branch, master has been updated via 631f016a9ccff344f4dcb0b57e8ef1cf275e175c (commit) from 78cd9ec509366e8a1fd61f077aba3a6537255ad1 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/libdom.git/commit/?id=631f016a9ccff344f4dc... commit 631f016a9ccff344f4dcb0b57e8ef1cf275e175c Author: Michael Drake <michael.drake(a)codethink.co.uk> Commit: Michael Drake <michael.drake(a)codethink.co.uk> Element: Change API to return a reference to callers. diff --git a/src/core/element.c b/src/core/element.c index 66d0390..05dc8c6 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1232,12 +1232,11 @@ dom_exception _dom_element_has_class(struct dom_element *element, /** * Get a named ancestor node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param ancestor Pointer to location to receive node. * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1254,7 +1253,7 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, assert(node->name != NULL); if (dom_string_caseless_lwc_isequal(node->name, name)) { - *ancestor = (dom_element *)node; + *ancestor = (dom_element *)dom_node_ref(node); break; } } @@ -1265,12 +1264,11 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, /** * Get a named parent node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param parent Pointer to location to receive node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1287,7 +1285,7 @@ dom_exception dom_element_named_parent_node(dom_element *element, assert(node->name != NULL); if (dom_string_caseless_lwc_isequal(node->name, name)) { - *parent = (dom_element *)node; + *parent = (dom_element *)dom_node_ref(node); } break; } @@ -1298,12 +1296,11 @@ dom_exception dom_element_named_parent_node(dom_element *element, /** * Get a named parent node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param parent Pointer to location to receive node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, @@ -1317,7 +1314,7 @@ dom_exception dom_element_parent_node(dom_element *element, if (node->type != DOM_ELEMENT_NODE) continue; - *parent = (dom_element *)node; + *parent = (dom_element *)dom_node_ref(node); break; } ----------------------------------------------------------------------- Summary of changes: src/core/element.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/src/core/element.c b/src/core/element.c index 66d0390..05dc8c6 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1232,12 +1232,11 @@ dom_exception _dom_element_has_class(struct dom_element *element, /** * Get a named ancestor node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param ancestor Pointer to location to receive node. * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1254,7 +1253,7 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, assert(node->name != NULL); if (dom_string_caseless_lwc_isequal(node->name, name)) { - *ancestor = (dom_element *)node; + *ancestor = (dom_element *)dom_node_ref(node); break; } } @@ -1265,12 +1264,11 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, /** * Get a named parent node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param parent Pointer to location to receive node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1287,7 +1285,7 @@ dom_exception dom_element_named_parent_node(dom_element *element, assert(node->name != NULL); if (dom_string_caseless_lwc_isequal(node->name, name)) { - *parent = (dom_element *)node; + *parent = (dom_element *)dom_node_ref(node); } break; } @@ -1298,12 +1296,11 @@ dom_exception dom_element_named_parent_node(dom_element *element, /** * Get a named parent node * - * If the caller wants to keep the returned node around, it must take its - * own ref. This call returns a borrow. + * The caller is responsible for unreffing the returned node. * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive borrowed node pointer + * \param parent Pointer to location to receive node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, @@ -1317,7 +1314,7 @@ dom_exception dom_element_parent_node(dom_element *element, if (node->type != DOM_ELEMENT_NODE) continue; - *parent = (dom_element *)node; + *parent = (dom_element *)dom_node_ref(node); break; } -- Document Object Model library

1 year, 8 months

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libdom: branch master updated. release/0.4.1-16-g78cd9ec

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/libdom.git/shortlog/78cd9ec509366e8a1fd61f... ...commit http://git.netsurf-browser.org/libdom.git/commit/78cd9ec509366e8a1fd61f07... ...tree http://git.netsurf-browser.org/libdom.git/tree/78cd9ec509366e8a1fd61f077a... The branch, master has been updated via 78cd9ec509366e8a1fd61f077aba3a6537255ad1 (commit) from 99e5503a28fbb754422086d140cdf030a66497c7 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/libdom.git/commit/?id=78cd9ec509366e8a1fd6... commit 78cd9ec509366e8a1fd61f077aba3a6537255ad1 Author: Michael Drake <michael.drake(a)codethink.co.uk> Commit: Michael Drake <michael.drake(a)codethink.co.uk> Element: API docs: Reword based on review. diff --git a/src/core/element.c b/src/core/element.c index a3d9ee7..66d0390 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1232,9 +1232,12 @@ dom_exception _dom_element_has_class(struct dom_element *element, /** * Get a named ancestor node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param ancestor Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1262,9 +1265,12 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, /** * Get a named parent node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1292,9 +1298,12 @@ dom_exception dom_element_named_parent_node(dom_element *element, /** * Get a named parent node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, ----------------------------------------------------------------------- Summary of changes: src/core/element.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/core/element.c b/src/core/element.c index a3d9ee7..66d0390 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1232,9 +1232,12 @@ dom_exception _dom_element_has_class(struct dom_element *element, /** * Get a named ancestor node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param ancestor Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1262,9 +1265,12 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, /** * Get a named parent node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1292,9 +1298,12 @@ dom_exception dom_element_named_parent_node(dom_element *element, /** * Get a named parent node * + * If the caller wants to keep the returned node around, it must take its + * own ref. This call returns a borrow. + * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive unreffed node pointer + * \param parent Pointer to location to receive borrowed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, -- Document Object Model library

1 year, 8 months

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libdom: branch master updated. release/0.4.1-15-g99e5503

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/libdom.git/shortlog/99e5503a28fbb754422086... ...commit http://git.netsurf-browser.org/libdom.git/commit/99e5503a28fbb754422086d1... ...tree http://git.netsurf-browser.org/libdom.git/tree/99e5503a28fbb754422086d140... The branch, master has been updated via 99e5503a28fbb754422086d140cdf030a66497c7 (commit) from 6f9b1a501fa8b95ba0befc9f3eea815f2ba4035d (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/libdom.git/commit/?id=99e5503a28fbb7544220... commit 99e5503a28fbb754422086d140cdf030a66497c7 Author: Michael Drake <michael.drake(a)codethink.co.uk> Commit: Michael Drake <michael.drake(a)codethink.co.uk> Element: Improve API documentation: Returned nodes aren't reffed. diff --git a/src/core/element.c b/src/core/element.c index 3b031a0..a3d9ee7 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1234,7 +1234,7 @@ dom_exception _dom_element_has_class(struct dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param ancestor Pointer to location to receive node pointer + * \param ancestor Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1264,7 +1264,7 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive node pointer + * \param parent Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1294,7 +1294,7 @@ dom_exception dom_element_named_parent_node(dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive node pointer + * \param parent Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, ----------------------------------------------------------------------- Summary of changes: src/core/element.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/core/element.c b/src/core/element.c index 3b031a0..a3d9ee7 100644 --- a/src/core/element.c +++ b/src/core/element.c @@ -1234,7 +1234,7 @@ dom_exception _dom_element_has_class(struct dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param ancestor Pointer to location to receive node pointer + * \param ancestor Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_ancestor_node(dom_element *element, @@ -1264,7 +1264,7 @@ dom_exception dom_element_named_ancestor_node(dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive node pointer + * \param parent Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_named_parent_node(dom_element *element, @@ -1294,7 +1294,7 @@ dom_exception dom_element_named_parent_node(dom_element *element, * * \param element Element to consider * \param name Node name to look for - * \param parent Pointer to location to receive node pointer + * \param parent Pointer to location to receive unreffed node pointer * \return DOM_NO_ERR. */ dom_exception dom_element_parent_node(dom_element *element, -- Document Object Model library

1 year, 8 months

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libdom: branch tlsa/refcheck created. release/0.4.1-15-gc60dcdb

by NetSurf Browser Project

Gitweb links: ...log http://git.netsurf-browser.org/libdom.git/shortlog/c60dcdb27441b0e71072ad... ...commit http://git.netsurf-browser.org/libdom.git/commit/c60dcdb27441b0e71072ad90... ...tree http://git.netsurf-browser.org/libdom.git/tree/c60dcdb27441b0e71072ad90ee... The branch, tlsa/refcheck has been created at c60dcdb27441b0e71072ad90ee14c67b73b84910 (commit) - Log ----------------------------------------------------------------- commitdiff http://git.netsurf-browser.org/libdom.git/commit/?id=c60dcdb27441b0e71072... commit c60dcdb27441b0e71072ad90ee14c67b73b84910 Author: Michael Drake <michael.drake(a)codethink.co.uk> Commit: Michael Drake <michael.drake(a)codethink.co.uk> WIP: Refcheck: Add dom node reference counting checking helper. diff --git a/include/dom/core/node.h b/include/dom/core/node.h index 90026a1..37fd2b8 100644 --- a/include/dom/core/node.h +++ b/include/dom/core/node.h @@ -73,12 +73,18 @@ typedef enum { typedef struct dom_node_internal dom_node_internal; +struct dom_refcheck; +struct dom_refcheck *dom_refcheck( + struct dom_refcheck *rc, + uint32_t refcnt); + /** * DOM node type */ typedef struct dom_node { const void *vtable; uint32_t refcnt; + struct dom_refcheck *rc; } dom_node; /* DOM node vtable */ @@ -177,9 +183,11 @@ typedef struct dom_node_vtable { static inline dom_node *dom_node_ref(dom_node *node) { - if (node != NULL) + if (node != NULL) { node->refcnt++; - + node->rc = dom_refcheck(node->rc, node->refcnt); + } + return node; } @@ -195,10 +203,11 @@ static inline dom_exception dom_node_try_destroy(dom_node *node) static inline void dom_node_unref(dom_node *node) { if (node != NULL) { - if (--node->refcnt == 0) + node->refcnt--; + node->rc = dom_refcheck(node->rc, node->refcnt); + if (node->refcnt == 0) dom_node_try_destroy(node); } - } #define dom_node_unref(n) dom_node_unref((dom_node *) (n)) diff --git a/src/core/node.c b/src/core/node.c index 1218742..0e3f818 100644 --- a/src/core/node.c +++ b/src/core/node.c @@ -199,7 +199,9 @@ dom_exception _dom_node_initialise(dom_node_internal *node, node->user_data = NULL; + node->base.rc = dom_refcheck(NULL, 0); node->base.refcnt = 1; + node->base.rc = dom_refcheck(node->base.rc, node->base.refcnt); list_init(&node->pending_list); if (node->type != DOM_DOCUMENT_NODE) { @@ -1904,7 +1906,9 @@ dom_exception _dom_node_copy_internal(dom_node_internal *old, new->prefix = NULL; new->user_data = NULL; + new->base.rc = dom_refcheck(NULL, 0); new->base.refcnt = 1; + new->base.rc = dom_refcheck(new->base.rc, new->base.refcnt); list_init(&new->pending_list); diff --git a/src/utils/Makefile b/src/utils/Makefile index f891b6e..027e3a5 100644 --- a/src/utils/Makefile +++ b/src/utils/Makefile @@ -1,4 +1,5 @@ # Sources -DIR_SOURCES := namespace.c hashtable.c character_valid.c validate.c walk.c +DIR_SOURCES := namespace.c hashtable.c character_valid.c validate.c walk.c \ + refcheck.c include $(NSBUILD)/Makefile.subdir diff --git a/src/utils/refcheck.c b/src/utils/refcheck.c new file mode 100644 index 0000000..fbba568 --- /dev/null +++ b/src/utils/refcheck.c @@ -0,0 +1,69 @@ +/* + * This file is part of libdom. + * Licensed under the MIT License, + * http://www.opensource.org/licenses/mit-license.php + * Copyright 2021 Michael Drake <tlsa(a)netsurf-browser.org> + */ + +/** \file + * This is an API for walking a loaded DOM. + */ + +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> + +#include <dom/dom.h> + +struct dom_refcheck { + size_t len; + uintptr_t *array; +}; + +struct dom_refcheck *dom_refcheck( + struct dom_refcheck *rc, + uint32_t refcnt) +{ + if (rc == NULL) { + rc = calloc(1, sizeof(*rc)); + if (rc == NULL) { + goto out; + } + + if (refcnt == 0) { + goto out; + } + } + + fprintf(stderr, "%p: refcnt: %u, len: %zu\n", rc, refcnt, rc->len); + + if (refcnt == rc->len - 1) { + //rc->array[refcnt] ^= UINTPTR_MAX; + free((void *)rc->array[refcnt]); + rc->array[refcnt] = (uintptr_t)NULL; + rc->len = refcnt; + + } else if (refcnt == rc->len + 1) { + uintptr_t *temp = realloc(rc->array, sizeof(*temp) * refcnt); + if (temp == NULL) { + goto out; + } + rc->array = temp; + + rc->array[rc->len] = (uintptr_t)malloc(1); + //rc->array[rc->len] ^= UINTPTR_MAX; + rc->len = refcnt; + } + + if (refcnt == 0) { + free(rc->array); + free(rc); + rc = NULL; + goto out; + + } else { + } + +out: + return rc; +} ----------------------------------------------------------------------- -- Document Object Model library

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netsurf-commits July 2021