I was under the impression that hypervisor mode wasn't done in
the ISA let
alone put in silicon?
So porting to RISC-V might be a bit premature.
On 20/01/18 22:54, Denis Obrezkov wrote:
> will lowRISC participate in GSoC 2018?
> I have an idea of porting xen or kvm on lowRISC. What do you think about
I found out that its spike implementation is on the way: