Recently some of our intern students encounter the some errors as you have.
According yo their feedback, the version seems matters on certain
machines, I assume you are using a ubuntu 16 with gcc 5.x.x?
What seems to fix the issue is to upgrade to Vivado 2015.4, and then
make cleanall in the nexys4 directory.
Also some feedback related to your previous email to me.
However, I have encountered
`GLIBCXX_3.4.21' not found" not only in RTL simulation "make
output/rv64ui-p-add.verilator.vcd " or "elf2hex 16 4096 rv64ui-p-add >
rv64ui-p-add.hex" but also in FPGA demo "make hello" compile and run
bare metal examples
The issue here is the default gcc/glibc library used in Xilinx is
incompatible with your local machine if you are using gcc 5.x.x
My solution to students is to have a gcc 4.8.4 installed and used when
using Xilinx related operations.
It is strange that you face the same error when running Verilator
simulation, which should be OK with gcc 5.x.x.
I am thinking your change of libc locally may mess up your own building
You had mentioned you fixed this issue by redirecting library paths.
I redirect the library path, it does not appear the "not found
I just wonder what exactly have you done to redirect library path?
The segment error may also caused by this according to my limited
understanding of the building environment.
On 01/07/2016 07:12, Stefan Wallentowitz wrote:
On 30.06.2016 21:34, Weizhong Huang wrote:
> Hello, all
> data2mem -bm src/boot.mem -bd src/boot.mem -bt lowrisc-chip-imp/lowrisc-chip-
> imp.runs/impl_1/chip_top.bit -o b lowrisc-chip-imp/lowrisc-chip-
> /opt/Xilinx/SDK/2015.3/bin/loader: line 164: 22333 Segmentation fault
This appears to be a Xilinx error. This may sound stupid, but can you
upgrade to 2015.4? I think thats the preferred version currently.