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Ethernet support for lowrisc

Re: [lowrisc-dev] Will lowRISC...

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Jawad Haj-Yahya

Monday, 18 December 2017 Mon, 18 Dec '17

11:36 a.m.

Hello, Could you please help with instructions on how to add support for Ethernet port to the latest lowrisc (0.4)? Best, Jawad Haj-Yahya

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Luke Kenneth Casson Leighton

Monday, 18 December Mon, 18 Dec

1:02 p.m.

On Mon, Dec 18, 2017 at 2:36 AM, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote:

Hello, Could you please help with instructions on how to add support for Ethernet port to the latest lowrisc (0.4)?

hi jawad, i've been dealing with software libre projects for a couple of decades, now. this is a developer mailing list (with some extremely busy and focussed people on it), which means that the rules of interaction are a little different from say... a user support forum or a paid product customer service centre. in particular, by asking questions it can be a *serious* distraction for them to answer. sometimes however they might actually want a break... but not *too* much of a break. generally-speaking, for a developer list, you're much more likely to get a response if you demonstrate that you're actually trying to answer the question yourself. then, by describing what you're doing, they can go - very VERY briefly - "yes that's it" or "no you should look here instead". also if you can keep it general, the developers will realise that their answers will help *more people* on the project [than just you] because of the public archives. ... so let's have a go: hi folks, [make it a general question] yes i too would like to know how to add peripherals (in general) to the lowrisc code, not just an ethernet port. [demonstrate trying to investigate for myself] so i've tracked down some Verilog code on opencores (some of it wishbone, some of it AXI4, but also tracked down an AXI-to-WB converter). i've also tracked down an RGMII Verilog implementation, again on opencores (and some other interfaces). [further demonstrate investigating for myself] also i admit i was looking at the rocket-chip code (where i understand that lowrisc is based on that?) and i noticed in the documentation here https://github.com/freechipsproject/rocket-chip that there is something about "Tiles" and "TileLink", also it is mentioning "AMBA" and from there AXI4 and AHB and so on, which is, i presume, where you would connect a peripheral. so, somewhere there must be a way to change one of the Scala settings files (which one?) to add in an extra... TileLink? to an AMBA "Tile"? and from there the Chisel compiler would... instantiate an extra AXI4 bus? [allow people to do the simplest possible thing: refer to some PRE-EXISTING online code] so has anyone actually done this, such that there are examples somewhere online that i can investigate, so as to save the developers here some time? surely somebody must have added a peripheral to a lowrisc core and published it somewhere :) [thank people for their time and also indicate that it's optional that they help] any assistance greatly appreciated. so, jawad - does that make sense? i appreciate that in this day and age people claim that they "don't have time to read"... usually that's because the 3 minute threshold for the next "fix" on the smartphone is coming up :) in this case however, on mailing lists, *especially* direct-contact libre developer mailing lists, they're a bit different: they have to focus for *several hours* on one task - no distractions. so you have to demonstrate that you're going to be a useful member of the group, and, not being rude, but a one-liner question is a good way to indicate otherwise :) anyway yes i do really want to know how to add peripherals, and yes it will be done as an online published project so that other people can learn from it. l.

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Luke Kenneth Casson Leighton

2:50 p.m.

ok jawad, so, again demonstrating "i'm trying to do this myself", a google search "rocket chip add peripherals" came up with this: https://github.com/ucb-bar/project-template/blob/master/README.md which, ta-daa, mentions something about "TileLink". honestly i don't quite follow exactly, it's not totally clear... ah ha! https://opencores.org/project,riscv_vhdl this guy appears to have done it! you can see, he's added an ethernet driver, UART, and a GPIO implementation. _unfortunately_ he also added a dependency on a proprietary library, so you'd need to examine what he's done rather than run it direct. he's at the very least added an TileLink-to-AMBA/AXI4 bridge, and done it in a similar way to Gaisler Research so that it's not necessary to modify external components. does that help? l.

Reply

Dr Jonathan Kimmitt

3:45 p.m.

Hi Jawad, This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes. Regards, Jonathan Sent from my iPhone

On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: Hello, Could you please help with instructions on how to add support for Ethernet port to the latest lowrisc (0.4)? Best, Jawad Haj-Yahya

Reply

Luke Kenneth Casson Leighton

4:11 p.m.

On Mon, Dec 18, 2017 at 6:45 AM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

Hi Jawad, This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes.

ok so this stuff is slightly hard to find: google "add peripheral site:lowrisc.org" the only useful thing that came up was: http://www.lowrisc.org/docs/untether-v0.2/ all other references were to RISC-V conference proceedings. starting from here: http://www.lowrisc.org/docs/ ah ha! ok so there's an example with a minion core (aka "state machine") that can handle SD card reading: http://www.lowrisc.org/docs/minion-v0.4/ so that looks like a good starting point. on here: http://www.lowrisc.org/docs/minion-v0.4/overview/ it's describing how the minion core (ak "state machine") is based on pulpino, and it can be seen in the diagram how that the bus connecting the two is AXI. ok. so, jawad, that would be a good starting point. you'd be able to examine that, and work from there to add an ethernet AXI hard macro to that bus. l.

Reply

Jawad Haj-Yahya

4:32 p.m.

Hi Luke, Thanks a lot for the detailed explanation, really appreciate your time. And thanks for the answers and links, it helped us. I found also the following link to the new lowrisc version from that includes Ethernet support: http://kimm.it/docs/ethernet-v0.5/ We are checking if this version working well for our purposes, at the end we would like to have 2 Ethernet ports that will be used for traffic monitoring. Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 3:11 PM, Luke Kenneth Casson Leighton <lkcl(a)lkcl.net

wrote:

> On Mon, Dec 18, 2017 at 6:45 AM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk>

wrote:

> > > Hi Jawad, > > This is something several people have been asking for and indeed there > is an ethernet-v0.5 branch with a preliminary version of this > functionality. There is no documentation yet but you can consult the > archives of this mailing list for preliminary instructions. It won’t affect > you I don’t think but the release and documentation is delayed until some > issues with license compatibility are resolved. By the way there are some > generic instructions on our website as to how to add peripherals which you > may care to review for learning purposes. > > ok so this stuff is slightly hard to find: google "add peripheral > site:lowrisc.org" the only useful thing that came up was: > > http://www.lowrisc.org/docs/untether-v0.2/ > > all other references were to RISC-V conference proceedings. > > starting from here: > http://www.lowrisc.org/docs/ > > ah ha! ok so there's an example with a minion core (aka "state > machine") that can handle SD card reading: > http://www.lowrisc.org/docs/minion-v0.4/ > > so that looks like a good starting point. on here: > http://www.lowrisc.org/docs/minion-v0.4/overview/ > > it's describing how the minion core (ak "state machine") is based on > pulpino, and it can be seen in the diagram how that the bus connecting > the two is AXI. > > ok. > > so, jawad, that would be a good starting point. you'd be able to > examine that, and work from there to add an ethernet AXI hard macro to > that bus. > > l. >

Reply

Luke Kenneth Casson Leighton

5:35 p.m.

--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68 On Mon, Dec 18, 2017 at 7:32 AM, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote:

Hi Luke, Thanks a lot for the detailed explanation, really appreciate your time. And thanks for the answers and links, it helped us.

no problem

I found also the following link to the new lowrisc version from that includes Ethernet support: http://kimm.it/docs/ethernet-v0.5/

ooo nice fiiind

We are checking if this version working well for our purposes, at the end we would like to have 2 Ethernet ports that will be used for traffic monitoring.

well, it looks like it's based on the other one, minion-0.4, sooOoo... a "git diff" back to the branch point (or a straight diff -u) would show you exactly where they began adding stuff, and that would tell you exactly what you need to know. exciting! :) l. p.s. is anyone else absolutely amazed that only about 5-7 years ago it was considered flat-out impossible to develop a processor unless you had like... $30 to $50 *million* dollars... now you can use a $499 zedboard??

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Luke Kenneth Casson Leighton

8:09 p.m.

https://github.com/lowRISC/minion_subsystem/blob/master/vivado/srcs/eth_s... ha! funny... investigating a little bit, it looks like the ethernet v0.5 minion core subsystem is actually using sergey's RMII implementation, i like that. so, jawad, that looks like it, doesn't it? there's a file minion_top_kc705.xpr which is an XML vivado project file... looks like that's where stuff (VHD and Verilog) is all pulled in... i'm trying to get my head round this stuff as well, as i too want to know how a new peripheral is added... $ cd minion_subsystem $ git log .... .... commit d16ed30e82f816692b1c790f2b068b81265171f6 Author: Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> Date: Fri Mar 10 17:23:50 2017 +0000 First check in to clean repository argh that's a pain. that means that the possibility of doing "git diff minion_core_branch_0.4" to easily find out exactly what the difference between the ethernet branch and the 0.4 minion core branch are... gone. argh. hmmm... https://github.com/lowRISC/minion_subsystem/tree/4de5f88bba8d2ede7816270d... it loooks like (running gitk) ah ha! that's a branch named "update-lic" whiich... still doesn't help if it's been totally reinitialised rather than forked from something else. lost here, can anyone help? from which branches (and using which git commands) would someone identify the changes made betweeen minion 0.4 and minion-ethernet 0.5 so that, from the diff, it's possible to see how the ethernet peripheral was added? tia, l.

Reply

Dr Jonathan Kimmitt

9:01 p.m.

The ethernet-v0.5 branch does not make use of minions at the moment. If you want to find the differences, check out both branches and run meld or a similar tool at the root. If you want to add a peripheral, check out this page: http://www.lowrisc.org/docs/internship-2016/device-tutorial/ The repository you referred to below is an obsolete method of communicating using EDCL. This old version uses greth internally. To get a Xilinx project for the main design, follow the usual procedure documented for earlier versions (make project in the nexys4_ddr directory) The current version of ethernet uses part of Philipp Kerling's ethernet mac library https://github.com/pkerling/ethernet_mac. Because this library is more restrictive in licensing that most of our files, we intend to replace it with a different FCS implementation before the next official release. Regards, Jonathan On 18/12/17 11:09, Luke Kenneth Casson Leighton wrote:

https://github.com/lowRISC/minion_subsystem/blob/master/vivado/srcs/eth_s... ha! funny... investigating a little bit, it looks like the ethernet v0.5 minion core subsystem is actually using sergey's RMII implementation, i like that. so, jawad, that looks like it, doesn't it? there's a file minion_top_kc705.xpr which is an XML vivado project file... looks like that's where stuff (VHD and Verilog) is all pulled in... i'm trying to get my head round this stuff as well, as i too want to know how a new peripheral is added... $ cd minion_subsystem $ git log .... .... commit d16ed30e82f816692b1c790f2b068b81265171f6 Author: Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> Date: Fri Mar 10 17:23:50 2017 +0000 First check in to clean repository argh that's a pain. that means that the possibility of doing "git diff minion_core_branch_0.4" to easily find out exactly what the difference between the ethernet branch and the 0.4 minion core branch are... gone. argh. hmmm... https://github.com/lowRISC/minion_subsystem/tree/4de5f88bba8d2ede7816270d... it loooks like (running gitk) ah ha! that's a branch named "update-lic" whiich... still doesn't help if it's been totally reinitialised rather than forked from something else. lost here, can anyone help? from which branches (and using which git commands) would someone identify the changes made betweeen minion 0.4 and minion-ethernet 0.5 so that, from the diff, it's possible to see how the ethernet peripheral was added? tia, l.

Reply

Luke Kenneth Casson Leighton

9:15 p.m.

--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68 On Mon, Dec 18, 2017 at 12:01 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

The ethernet-v0.5 branch does not make use of minions at the moment.

... ok.

If you want to find the differences, check out both branches and run meld

i'm used to doing "git diff" or before git came along, "diff -ur" :)

or a similar tool at the root. If you want to add a peripheral, check out this page: http://www.lowrisc.org/docs/internship-2016/device-tutorial/

ah ha! excellent

The repository you referred to below is an obsolete method of communicating using EDCL.

oh ok. curious, as i just followed the git checkout from the eth-v0.5 instructions (ok not quite, as i already had a lowrisc checkout)

This old version uses greth internally. To get a Xilinx project for the main design, follow the usual procedure documented for earlier versions (make project in the nexys4_ddr directory) The current version of ethernet uses part of Philipp Kerling's ethernet mac library https://github.com/pkerling/ethernet_mac. Because this library is more restrictive in licensing that most of our files, we intend to replace it with a different FCS implementation before the next official release.

https://github.com/pkerling/ethernet_mac/blob/master/LICENSE.md yuk! it's definitely a nonfree license. "Must Not Be Used For Military Or Medical Purposes" gaah! :) l.

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Alain Toussaint

Tuesday, 19 December Tue, 19 Dec

noon

yuk! it's definitely a nonfree license. "Must Not Be Used For Military Or Medical Purposes" gaah! :)

Excuse me for the comment but as a medically related scientist (see https://www.frontiersin.org/articles/10.3389/fpsyg.2010.00241/full) who will soon be back into neuroscience research, that pain me a lot. Alain

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Luke Kenneth Casson Leighton

12:22 p.m.

On Tue, Dec 19, 2017 at 3:00 AM, Alain Toussaint <atoussaint1976(a)gmail.com> wrote:

> yuk! it's definitely a nonfree license. "Must Not Be Used For > Military Or Medical Purposes" gaah! :) Excuse me for the comment but as a medically related scientist (see https://www.frontiersin.org/articles/10.3389/fpsyg.2010.00241/full) who will soon be back into neuroscience research, that pain me a lot.

truth hurts, doesn't it? many many apologies but that's just the way it is. i trust that you recognise, from the medical profession, that to cure an illness sometimes it hurts. if you avoid the cure, you become even more ill. granting people *true* freedom means that you cannot dictate to people what they can or cannot do: it's actually unethical to do so. as someone in the medical profession, you will understand and appreciate the value and the importance of the hippocratic oath, but it may not have occurred to to you the application of ethics to *software* hold just as critical a level of priority. very few people - even those who claim to know about free software (you can easily spot the ones that definitely don't, because they use the words "open source", but there are even those who use the phrase "free software" who don't really get it either) - *actually* truly understand what free software is about: it's about the application of ethical insight and ethical decision-making *to software*. so - yes. sorry, but that's the reality: dictating to people "hey you can't use this software for commercial purposes" or "hey you can't use this software in medical devices" and so on *restricts their freedom of choice*. the reality is: that's unethical, plain and simple. so such licenses (definitely including Creative Commons "non-commercial") have to be classified as "non-free". l.

Reply

Dr Jonathan Kimmitt

6:30 p.m.

It does seem harsh, but the habit of medical lawyers suing each other to kingdom come means that many people will not touch the area without masses of reinsurance, which needless to say, individual developers cannot afford. On 19/12/17 03:00, Alain Toussaint wrote:

> yuk! it's definitely a nonfree license. "Must Not Be Used For > Military Or Medical Purposes" gaah! :) Excuse me for the comment but as a medically related scientist (see https://www.frontiersin.org/articles/10.3389/fpsyg.2010.00241/full) who will soon be back into neuroscience research, that pain me a lot. Alain

Reply

Luke Kenneth Casson Leighton

7 p.m.

On Tue, Dec 19, 2017 at 9:30 AM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

It does seem harsh, but the habit of medical lawyers suing each other to kingdom come means that many people will not touch the area without masses of reinsurance, which needless to say, individual developers cannot afford.

that hadn't occurred to me that the medical profession would be full of lawyers.... hmm, allow me to put it another way, if i may, taking that into account: is it the place of the developer of some source code to TERMINATE all and any possibility of someone re-using code to make that assessment of their own accord, will and responsibility, get the required insurance, and, eyes-open knowing exactly what they're getting into with the sue-happy medical profession, go ahead with a project that utilises someone else's software libre library? whatever objections the *developer* can come up with, no matter how "moral" or "right" or "protecting" they are of the potential users of that code, if they're restrictions, it's blocking the freedom of the users to learn from their own mistakes. and i say that even though i really don't like the possibility - and this *will* happen eventually - of the mass-volume industry pandering to the media cartels and taking RISC-V processors and shoving DRM and Tivoisation in them. i don't *like* that possibility... but i have to respect their right to do it. who's that famous guy who said "i don't agree with what you say but i'll defend to the death your right to say it?" l.

Reply

Michael Clark

7:15 p.m.

Surely the standard MIT or BSD warranty disclaimers would allay those concerns. It is technically a “non-free” license as restrictions on fields of endeavour are “discriminatory clauses”. Interesting to note, is that these licenses do not take into account Hardware and HDLs. i.e. SOFTWARE should be changed to a more general term. Is there a license designed for open hardware? THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

On 19/12/2017, at 10:30 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: It does seem harsh, but the habit of medical lawyers suing each other to kingdom come means that many people will not touch the area without masses of reinsurance, which needless to say, individual developers cannot afford. On 19/12/17 03:00, Alain Toussaint wrote: >> yuk! it's definitely a nonfree license. "Must Not Be Used For >> Military Or Medical Purposes" gaah! :) > Excuse me for the comment but as a medically related scientist (see > https://www.frontiersin.org/articles/10.3389/fpsyg.2010.00241/full) > who will soon be back into neuroscience research, that pain me a lot. > > Alain

Reply

Alex Bradbury

7:22 p.m.

On 19 December 2017 at 10:15, Michael Clark <michaeljclark(a)mac.com> wrote:

Surely the standard MIT or BSD warranty disclaimers would allay those concerns. It is technically a “non-free” license as restrictions on fields of endeavour are “discriminatory clauses”. Interesting to note, is that these licenses do not take into account Hardware and HDLs. i.e. SOFTWARE should be changed to a more general term. Is there a license designed for open hardware?

There are a number. The CERN OHL and the TAPR Open Hardware License are copyleft hardware licenses. As far as permissive license go, we really like the Solderpad license, which is a minimal modification to the Apache license to include specific references to hardware, semiconductor mask rights etc http://solderpad.org/licenses/ The FOSSi Foundation are actively working in this area https://fossi-foundation.org/licensing Best, Alex

Reply

Luke Kenneth Casson Leighton

7:47 p.m.

--- crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68 On Tue, Dec 19, 2017 at 10:22 AM, Alex Bradbury <asb(a)lowrisc.org> wrote:

> Is there a license designed for open hardware? There are a number. The CERN OHL and the TAPR Open Hardware License are copyleft hardware licenses. As far as permissive license go, we really like the Solderpad license, which is a minimal modification to the Apache license to include specific references to hardware, semiconductor mask rights etc http://solderpad.org/licenses/

cool. ... here's the one niggle that has to be taken into account: electronics schematics, by virtue of them being a branch of mathematics (logic) are *not copyrightable*. bruce perens' take on this is that we should never, under any circumstances, claim "copyright" of electronics, because it is a serious mistake to do so, by virtue of fixing the false impression in peoples' minds - lawyers, law-makers in particular - that you *can* copyright a schematic. PCB *layouts* - and ASIC *layout*s on the other hand, totally different matter. l.

Reply

Jawad Haj-Yahya

3:19 p.m.

The Ethernet v0.5 is not working for us, we have compilation error as some file is missing, also the pre-build image is missing. We will keep checking how to add the Ethernet ports for our project, please update with any findings. Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 7:09 PM, Luke Kenneth Casson Leighton <lkcl(a)lkcl.net

wrote:

https://github.com/lowRISC/minion_subsystem/blob/master/ vivado/srcs/eth_soc_kc705.vhd ha! funny... investigating a little bit, it looks like the ethernet v0.5 minion core subsystem is actually using sergey's RMII implementation, i like that. so, jawad, that looks like it, doesn't it? there's a file minion_top_kc705.xpr which is an XML vivado project file... looks like that's where stuff (VHD and Verilog) is all pulled in... i'm trying to get my head round this stuff as well, as i too want to know how a new peripheral is added... $ cd minion_subsystem $ git log .... .... commit d16ed30e82f816692b1c790f2b068b81265171f6 Author: Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> Date: Fri Mar 10 17:23:50 2017 +0000 First check in to clean repository argh that's a pain. that means that the possibility of doing "git diff minion_core_branch_0.4" to easily find out exactly what the difference between the ethernet branch and the 0.4 minion core branch are... gone. argh. hmmm... https://github.com/lowRISC/minion_subsystem/tree/ 4de5f88bba8d2ede7816270d2693cb2ba44e0a82 it loooks like (running gitk) ah ha! that's a branch named "update-lic" whiich... still doesn't help if it's been totally reinitialised rather than forked from something else. lost here, can anyone help? from which branches (and using which git commands) would someone identify the changes made betweeen minion 0.4 and minion-ethernet 0.5 so that, from the diff, it's possible to see how the ethernet peripheral was added? tia, l.

Reply

Jawad Haj-Yahya

Monday, 18 December Mon, 18 Dec

4:33 p.m.

Thanks Jonathan for your answers. Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

Hi Jawad, This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes. Regards, Jonathan Sent from my iPhone > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: > > Hello, > > Could you please help with instructions on how to add support for Ethernet > port to the latest lowrisc (0.4)? > > > Best, > Jawad Haj-Yahya

Reply

Jawad Haj-Yahya

Tuesday, 19 December Tue, 19 Dec

5:02 p.m.

Hi Jonathan, Do you have link to the branch that you mentioned: there is an ethernet-v0.5 branch with a preliminary version of this functionality ... One more question please regarding the following IP : https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I heard that there might be issue to include VHDL code with lowrisc 0.4, how this was handled? Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

Hi Jawad, This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes. Regards, Jonathan Sent from my iPhone > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: > > Hello, > > Could you please help with instructions on how to add support for Ethernet > port to the latest lowrisc (0.4)? > > > Best, > Jawad Haj-Yahya

Reply

Dr Jonathan Kimmitt

9:27 p.m.

Dear Jawad, Please try the following sequence of commands and let me know where it fails ... (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your net setup might be different) sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev libelf-dev python-dev microcom source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you installed Vivado unset LD_LIBRARY_PATH git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/lowrisc-chip.git lowrisc-chip-ethernet-v0.5 cd lowrisc-chip-ethernet-v0.5 source set_env.sh sh $TOP/riscv-tools/fetch_and_patch_linux.sh cd $TOP/riscv-tools/ ./build.sh cd riscv-gnu-toolchain/build ../configure --prefix=$RISCV make -j$(nproc) linux cd $TOP/fpga/board/nexys4_ddr make bitstream make cfgmem make program-cfgmem (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p /dev/ttyUSB1 in another window) make etherboot On 19/12/17 08:02, Jawad Haj-Yahya wrote:

Hi Jonathan, Do you have link to the branch that you mentioned: there is an ethernet-v0.5 branch with a preliminary version of this functionality ... One more question please regarding the following IP :https://github.com/pkerling/ethernet_mac <https://github.com/pkerling/ethernet_mac> , it's implemented in VHDL, I heard that there might be issue to include VHDL code with lowrisc 0.4, how this was handled?

You are right VHDL files cannot be used with Verilator. I am only using one file from pkerling which I partially manually translated to Verilog

Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk <mailto:jrrk2@cam.ac.uk>> wrote: Hi Jawad, This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes. Regards, Jonathan Sent from my iPhone > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com <mailto:jawadhy@gmail.com>> wrote: > > Hello, > > Could you please help with instructions on how to add support for Ethernet > port to the latest lowrisc (0.4)? > > > Best, > Jawad Haj-Yahya

Reply

Jawad Haj-Yahya

Wednesday, 20 December Wed, 20 Dec

12:31 p.m.

Hi Jonathan, Thanks a lot for the detailed mail. We have tried the instructions and we are facing the following failure in the compilation, could you please take a look: ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream vivado -mode batch -source ../../common/script/make_bitstream.tcl -tclargs lowrisc-chip-imp ****** Vivado v2015.4 (64-bit) **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. source ../../common/script/make_bitstream.tcl # set origin_dir "." # set project_name [lindex $argv 0] # set orig_proj_dir [file normalize $origin_dir/$project_name] # open_project $orig_proj_dir/$project_name.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = 117689 # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress WARNING: [Common 17-1361] You have specified a new message control rule that is equivalent to an existing rule with attributes ' -ruleid {8} -id {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. # reset_run synth_1 # reset_run impl_1 # launch_runs synth_1 ERROR: [Common 17-70] Application Exception: Failed to launch run 'synth_1' due to failures in the following run(s): axi_uart16550_0_synth_1 axi_bram_ctrl_1_synth_1 axi_bram_ctrl_0_synth_1 axi_bram_ctrl_2_synth_1 mig_7series_0_synth_1 axi_clock_converter_0_synth_1 clk_wiz_0_synth_1 clk_wiz_1_synth_1 These failed run(s) need to be reset prior to launching 'synth_1' again. INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc- chip-imp.runs/impl_1/chip_top.bit' failed make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] Error 1 Best, Jawad Haj-Yahya On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

Dear Jawad, Please try the following sequence of commands and let me know where it fails ... (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your net setup might be different) sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev libelf-dev python-dev microcom source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you installed Vivado unset LD_LIBRARY_PATH git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/ lowrisc-chip.git lowrisc-chip-ethernet-v0.5 cd lowrisc-chip-ethernet-v0.5 source set_env.sh sh $TOP/riscv-tools/fetch_and_patch_linux.sh cd $TOP/riscv-tools/ ./build.sh cd riscv-gnu-toolchain/build ../configure --prefix=$RISCV make -j$(nproc) linux cd $TOP/fpga/board/nexys4_ddr make bitstream make cfgmem make program-cfgmem (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p /dev/ttyUSB1 in another window) make etherboot On 19/12/17 08:02, Jawad Haj-Yahya wrote: Hi Jonathan, Do you have link to the branch that you mentioned: there is an ethernet-v0.5 branch with a preliminary version of this functionality ... One more question please regarding the following IP : https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I heard that there might be issue to include VHDL code with lowrisc 0.4, how this was handled? You are right VHDL files cannot be used with Verilator. I am only using one file from pkerling which I partially manually translated to Verilog Best, Jawad Haj-Yahya On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: > Hi Jawad, > This is something several people have been asking for and indeed there > is an ethernet-v0.5 branch with a preliminary version of this > functionality. There is no documentation yet but you can consult the > archives of this mailing list for preliminary instructions. It won’t affect > you I don’t think but the release and documentation is delayed until some > issues with license compatibility are resolved. By the way there are some > generic instructions on our website as to how to add peripherals which you > may care to review for learning purposes. > > Regards, > Jonathan > > Sent from my iPhone > > > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: > > > > Hello, > > > > Could you please help with instructions on how to add support for > Ethernet > > port to the latest lowrisc (0.4)? > > > > > > Best, > > Jawad Haj-Yahya > >

Reply

Dr Jonathan Kimmitt

5:44 p.m.

Dear Jawad, It looks like Vivado is failing to build the standard IP. The most likely reason is that your workstation lacks the license for webpack which is needed. You need to follow the procedure on the Xilinx website to install a license. Alternatively if you work for a company or educational institution it may have a site license which you can point to with an environment variable. To get detailed information about the errors, run 'make vivado' in the same directory that you ran 'make bitstream' and the GUI will open. You will see a window with a detailed list of errors. If license error is mentioned you can launch the license manager from the help menu and see your license status. If there is still doubt try running Vivado with one of the example designs that comes with it that is known to work. Problems with Vivado are not really covered by our website because there is comprehensive information on Xilinx's own website. Regards, Jonathan On 20/12/17 03:31, Jawad Haj-Yahya wrote:

Hi Jonathan, Thanks a lot for the detailed mail. We have tried the instructions and we are facing the following failure in the compilation, could you please take a look: ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream vivado -mode batch -source ../../common/script/make_bitstream.tcl -tclargs lowrisc-chip-imp ****** Vivado v2015.4 (64-bit) **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. source ../../common/script/make_bitstream.tcl # set origin_dir "." # set project_name [lindex $argv 0] # set orig_proj_dir [file normalize $origin_dir/$project_name] # open_project $orig_proj_dir/$project_name.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = 117689 # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress WARNING: [Common 17-1361] You have specified a new message control rule that is equivalent to an existing rule with attributes ' -ruleid {8} -id {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. # reset_run synth_1 # reset_run impl_1 # launch_runs synth_1 ERROR: [Common 17-70] Application Exception: Failed to launch run 'synth_1' due to failures in the following run(s): axi_uart16550_0_synth_1 axi_bram_ctrl_1_synth_1 axi_bram_ctrl_0_synth_1 axi_bram_ctrl_2_synth_1 mig_7series_0_synth_1 axi_clock_converter_0_synth_1 clk_wiz_0_synth_1 clk_wiz_1_synth_1 These failed run(s) need to be reset prior to launching 'synth_1' again. INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit' failed make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] Error 1 Best, Jawad Haj-Yahya On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk <mailto:jrrk2@cam.ac.uk>> wrote: Dear Jawad, Please try the following sequence of commands and let me know where it fails ... (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your net setup might be different) sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev libelf-dev python-dev microcom source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you installed Vivado unset LD_LIBRARY_PATH git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/lowrisc-chip.git <https://github.com/lowrisc/lowrisc-chip.git> lowrisc-chip-ethernet-v0.5 cd lowrisc-chip-ethernet-v0.5 source set_env.sh sh $TOP/riscv-tools/fetch_and_patch_linux.sh cd $TOP/riscv-tools/ ./build.sh cd riscv-gnu-toolchain/build ../configure --prefix=$RISCV make -j$(nproc) linux cd $TOP/fpga/board/nexys4_ddr make bitstream make cfgmem make program-cfgmem (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p /dev/ttyUSB1 in another window) make etherboot On 19/12/17 08:02, Jawad Haj-Yahya wrote: > Hi Jonathan, > > Do you have link to the branch that you mentioned: there is an > ethernet-v0.5 branch with a preliminary version of this > functionality ... > > One more question please regarding the following IP > :https://github.com/pkerling/ethernet_mac > <https://github.com/pkerling/ethernet_mac> , it's implemented in > VHDL, I heard that there might be issue to include VHDL code with > lowrisc 0.4, how this was handled? > You are right VHDL files cannot be used with Verilator. I am only using one file from pkerling which I partially manually translated to Verilog > > Best, > Jawad Haj-Yahya > > On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt > <jrrk2(a)cam.ac.uk <mailto:jrrk2@cam.ac.uk>> wrote: > > Hi Jawad, > This is something several people have been asking for and > indeed there is an ethernet-v0.5 branch with a preliminary > version of this functionality. There is no documentation yet > but you can consult the archives of this mailing list for > preliminary instructions. It won’t affect you I don’t think > but the release and documentation is delayed until some > issues with license compatibility are resolved. By the way > there are some generic instructions on our website as to how > to add peripherals which you may care to review for learning > purposes. > > Regards, > Jonathan > > Sent from my iPhone > > > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya > <jawadhy(a)gmail.com <mailto:jawadhy@gmail.com>> wrote: > > > > Hello, > > > > Could you please help with instructions on how to add > support for Ethernet > > port to the latest lowrisc (0.4)? > > > > > > Best, > > Jawad Haj-Yahya > >

Reply

Jawad Haj-Yahya

6:51 p.m.

Hi Jonathan, Thanks a lot for the promoted answer, we have fixed the license issue and we are retrying, will update soon. Thanks, Jawad On Wed, Dec 20, 2017, 4:44 PM Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

Dear Jawad, It looks like Vivado is failing to build the standard IP. The most likely reason is that your workstation lacks the license for webpack which is needed. You need to follow the procedure on the Xilinx website to install a license. Alternatively if you work for a company or educational institution it may have a site license which you can point to with an environment variable. To get detailed information about the errors, run 'make vivado' in the same directory that you ran 'make bitstream' and the GUI will open. You will see a window with a detailed list of errors. If license error is mentioned you can launch the license manager from the help menu and see your license status. If there is still doubt try running Vivado with one of the example designs that comes with it that is known to work. Problems with Vivado are not really covered by our website because there is comprehensive information on Xilinx's own website. Regards, Jonathan On 20/12/17 03:31, Jawad Haj-Yahya wrote: Hi Jonathan, Thanks a lot for the detailed mail. We have tried the instructions and we are facing the following failure in the compilation, could you please take a look: ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream vivado -mode batch -source ../../common/script/make_bitstream.tcl -tclargs lowrisc-chip-imp ****** Vivado v2015.4 (64-bit) **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. source ../../common/script/make_bitstream.tcl # set origin_dir "." # set project_name [lindex $argv 0] # set orig_proj_dir [file normalize $origin_dir/$project_name] # open_project $orig_proj_dir/$project_name.xpr Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = 117689 # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress WARNING: [Common 17-1361] You have specified a new message control rule that is equivalent to an existing rule with attributes ' -ruleid {8} -id {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. # reset_run synth_1 # reset_run impl_1 # launch_runs synth_1 ERROR: [Common 17-70] Application Exception: Failed to launch run 'synth_1' due to failures in the following run(s): axi_uart16550_0_synth_1 axi_bram_ctrl_1_synth_1 axi_bram_ctrl_0_synth_1 axi_bram_ctrl_2_synth_1 mig_7series_0_synth_1 axi_clock_converter_0_synth_1 clk_wiz_0_synth_1 clk_wiz_1_synth_1 These failed run(s) need to be reset prior to launching 'synth_1' again. INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit' failed make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] Error 1 Best, Jawad Haj-Yahya On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: > Dear Jawad, > > Please try the following sequence of commands and let me know where it > fails ... > > (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) > > (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your net > setup might be different) > > sudo apt-get install autoconf automake autotools-dev curl libmpc-dev > libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf > libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev > libelf-dev python-dev microcom > source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you > installed Vivado > unset LD_LIBRARY_PATH > git clone -b ethernet-v0.5 --recursive > https://github.com/lowrisc/lowrisc-chip.git lowrisc-chip-ethernet-v0.5 > cd lowrisc-chip-ethernet-v0.5 > source set_env.sh > sh $TOP/riscv-tools/fetch_and_patch_linux.sh > cd $TOP/riscv-tools/ > ./build.sh > cd riscv-gnu-toolchain/build > ../configure --prefix=$RISCV > make -j$(nproc) linux > cd $TOP/fpga/board/nexys4_ddr > make bitstream > make cfgmem > make program-cfgmem > > (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p > /dev/ttyUSB1 in another window) > > make etherboot > > > On 19/12/17 08:02, Jawad Haj-Yahya wrote: > > Hi Jonathan, > > Do you have link to the branch that you mentioned: there is an ethernet-v0.5 > branch with a preliminary version of this functionality ... > > One more question please regarding the following IP : > https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I > heard that there might be issue to include VHDL code with lowrisc 0.4, how > this was handled? > > You are right VHDL files cannot be used with Verilator. I am only using > one file from pkerling which I partially manually translated to Verilog > > > Best, > Jawad Haj-Yahya > > On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> > wrote: > >> Hi Jawad, >> This is something several people have been asking for and indeed there >> is an ethernet-v0.5 branch with a preliminary version of this >> functionality. There is no documentation yet but you can consult the >> archives of this mailing list for preliminary instructions. It won’t affect >> you I don’t think but the release and documentation is delayed until some >> issues with license compatibility are resolved. By the way there are some >> generic instructions on our website as to how to add peripherals which you >> may care to review for learning purposes. >> >> Regards, >> Jonathan >> >> Sent from my iPhone >> >> > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: >> > >> > Hello, >> > >> > Could you please help with instructions on how to add support for >> Ethernet >> > port to the latest lowrisc (0.4)? >> > >> > >> > Best, >> > Jawad Haj-Yahya >> >> > > --

Best, Jawad Haj-Yahya

Reply

Jawad Haj-Yahya

Thursday, 21 December Thu, 21 Dec

11:33 a.m.

Hi Jonathan, After fixing the licence issue, the chip_top.bit file was succesfully created but make etherboot step gives some error. we still see the following error: ubuntugs01:~/lowrisc-chip-ethernet-v0.5/fpga/board/nexys4_ddr$ make etherboot ../../common/script/recvRawEth -r eth0 boot0001.bin File = boot0001.bin, len = 5272272, chunks = 5149 MD5 sum = b35cd8c494e423962b3475c32dfd8d1c SO_BINDTODEVICE: No such device Makefile:218: recipe for target 'etherboot' failed make: *** [etherboot] Error 1 Any idea why this failure? Best, Jawad Haj-Yahya On Wed, Dec 20, 2017 at 5:51 PM, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote:

Hi Jonathan, Thanks a lot for the promoted answer, we have fixed the license issue and we are retrying, will update soon. Thanks, Jawad On Wed, Dec 20, 2017, 4:44 PM Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: > Dear Jawad, > > It looks like Vivado is failing to build the standard IP. The most likely > reason is that your workstation lacks the license for webpack which is > needed. You need to follow the procedure on the Xilinx website to install a > license. Alternatively if you work for a company or educational institution > it may have a site license which you can point to with an environment > variable. To get detailed information about the errors, run 'make vivado' > in the same directory that you ran 'make bitstream' and the GUI will open. > You will see a window with a detailed list of errors. If license error is > mentioned you can launch the license manager from the help menu and see > your license status. If there is still doubt try running Vivado with one of > the example designs that comes with it that is known to work. Problems with > Vivado are not really covered by our website because there is comprehensive > information on Xilinx's own website. > > Regards, > > Jonathan > > On 20/12/17 03:31, Jawad Haj-Yahya wrote: > > Hi Jonathan, > > Thanks a lot for the detailed mail. We have tried the instructions and we > are facing the following failure in the compilation, could you please take > a look: > > ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream > vivado -mode batch -source ../../common/script/make_bitstream.tcl > -tclargs lowrisc-chip-imp > > ****** Vivado v2015.4 (64-bit) > **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 > **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 > ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. > > source ../../common/script/make_bitstream.tcl > # set origin_dir "." > # set project_name [lindex $argv 0] > # set orig_proj_dir [file normalize $origin_dir/$project_name] > # open_project $orig_proj_dir/$project_name.xpr > Scanning sources... > Finished scanning sources > INFO: [IP_Flow 19-234] Refreshing IP repositories > INFO: [IP_Flow 19-1704] No user IP repositories specified > INFO: [IP_Flow 19-2313] Loaded Vivado IP repository > '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. > open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory > (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = > 117689 > # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress > WARNING: [Common 17-1361] You have specified a new message control rule > that is equivalent to an existing rule with attributes ' -ruleid {8} -id > {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. > # reset_run synth_1 > # reset_run impl_1 > # launch_runs synth_1 > ERROR: [Common 17-70] Application Exception: Failed to launch run > 'synth_1' due to failures in the following run(s): > axi_uart16550_0_synth_1 > axi_bram_ctrl_1_synth_1 > axi_bram_ctrl_0_synth_1 > axi_bram_ctrl_2_synth_1 > mig_7series_0_synth_1 > axi_clock_converter_0_synth_1 > clk_wiz_0_synth_1 > clk_wiz_1_synth_1 > These failed run(s) need to be reset prior to launching 'synth_1' again. > > INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... > Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc- > chip-imp.runs/impl_1/chip_top.bit' failed > make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] > Error 1 > > Best, > Jawad Haj-Yahya > > On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> > wrote: > >> Dear Jawad, >> >> Please try the following sequence of commands and let me know where it >> fails ... >> >> (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) >> >> (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your >> net setup might be different) >> >> sudo apt-get install autoconf automake autotools-dev curl libmpc-dev >> libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf >> libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev >> libelf-dev python-dev microcom >> source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you >> installed Vivado >> unset LD_LIBRARY_PATH >> git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/ >> lowrisc-chip.git lowrisc-chip-ethernet-v0.5 >> cd lowrisc-chip-ethernet-v0.5 >> source set_env.sh >> sh $TOP/riscv-tools/fetch_and_patch_linux.sh >> cd $TOP/riscv-tools/ >> ./build.sh >> cd riscv-gnu-toolchain/build >> ../configure --prefix=$RISCV >> make -j$(nproc) linux >> cd $TOP/fpga/board/nexys4_ddr >> make bitstream >> make cfgmem >> make program-cfgmem >> >> (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p >> /dev/ttyUSB1 in another window) >> >> make etherboot >> >> >> On 19/12/17 08:02, Jawad Haj-Yahya wrote: >> >> Hi Jonathan, >> >> Do you have link to the branch that you mentioned: there is an ethernet-v0.5 >> branch with a preliminary version of this functionality ... >> >> One more question please regarding the following IP : >> https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I >> heard that there might be issue to include VHDL code with lowrisc 0.4, how >> this was handled? >> >> You are right VHDL files cannot be used with Verilator. I am only using >> one file from pkerling which I partially manually translated to Verilog >> >> >> Best, >> Jawad Haj-Yahya >> >> On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> >> wrote: >> >>> Hi Jawad, >>> This is something several people have been asking for and indeed >>> there is an ethernet-v0.5 branch with a preliminary version of this >>> functionality. There is no documentation yet but you can consult the >>> archives of this mailing list for preliminary instructions. It won’t affect >>> you I don’t think but the release and documentation is delayed until some >>> issues with license compatibility are resolved. By the way there are some >>> generic instructions on our website as to how to add peripherals which you >>> may care to review for learning purposes. >>> >>> Regards, >>> Jonathan >>> >>> Sent from my iPhone >>> >>> > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: >>> > >>> > Hello, >>> > >>> > Could you please help with instructions on how to add support for >>> Ethernet >>> > port to the latest lowrisc (0.4)? >>> > >>> > >>> > Best, >>> > Jawad Haj-Yahya >>> >>> >> >> > > -- Best, Jawad Haj-Yahya

Reply

Dr Jonathan Kimmitt

4:46 p.m.

This Makefile assumes your nexys4ddr is directly or indirectly connected to eth0 (a physical Ethernet port, 100baseT on your build box in the 192.168.0.* region. There are a number of ways to satisfy this requirement such as purchasing a second Ethernet port or using a home hub and/or modifying the Ethernet device name in the Makefile. Start by running: /sbin/ifconfig -a This build system was tested with host=192.168.0.53, target=192.168.0.51 These settings can be changed but the easy option is the second port or a laptop with Ethernet and Wifi. The home hub option allows routing to the outside world which is very useful. In this preview the IP addressing is fixed for booting over Ethernet and NFS root. The alternative using SD card for root can use DHCP for networking, but your IT manager might not be too happy with an FPGA board plugged directly into the VLAN. Sent from my iPhone

On 21 Dec 2017, at 02:33, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: Hi Jonathan, After fixing the licence issue, the chip_top.bit file was succesfully created but make etherboot step gives some error. we still see the following error: ubuntugs01:~/lowrisc-chip-ethernet-v0.5/fpga/board/nexys4_ddr$ make etherboot ../../common/script/recvRawEth -r eth0 boot0001.bin File = boot0001.bin, len = 5272272, chunks = 5149 MD5 sum = b35cd8c494e423962b3475c32dfd8d1c SO_BINDTODEVICE: No such device Makefile:218: recipe for target 'etherboot' failed make: *** [etherboot] Error 1 Any idea why this failure? Best, Jawad Haj-Yahya > On Wed, Dec 20, 2017 at 5:51 PM, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: > Hi Jonathan, > > Thanks a lot for the promoted answer, we have fixed the license issue and we are retrying, will update soon. > > Thanks, > Jawad > >> On Wed, Dec 20, 2017, 4:44 PM Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: >> Dear Jawad, >> >> It looks like Vivado is failing to build the standard IP. The most likely reason is that your workstation lacks the license for webpack which is needed. You need to follow the procedure on the Xilinx website to install a license. Alternatively if you work for a company or educational institution it may have a site license which you can point to with an environment variable. To get detailed information about the errors, run 'make vivado' in the same directory that you ran 'make bitstream' and the GUI will open. You will see a window with a detailed list of errors. If license error is mentioned you can launch the license manager from the help menu and see your license status. If there is still doubt try running Vivado with one of the example designs that comes with it that is known to work. Problems with Vivado are not really covered by our website because there is comprehensive information on Xilinx's own website. >> Regards, >> >> Jonathan >> >>> On 20/12/17 03:31, Jawad Haj-Yahya wrote: >>> Hi Jonathan, >>> >>> Thanks a lot for the detailed mail. We have tried the instructions and we are facing the following failure in the compilation, could you please take a look: >>> >>> ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream >>> vivado -mode batch -source ../../common/script/make_bitstream.tcl -tclargs lowrisc-chip-imp >>> >>> ****** Vivado v2015.4 (64-bit) >>> **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 >>> **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 >>> ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. >>> >>> source ../../common/script/make_bitstream.tcl >>> # set origin_dir "." >>> # set project_name [lindex $argv 0] >>> # set orig_proj_dir [file normalize $origin_dir/$project_name] >>> # open_project $orig_proj_dir/$project_name.xpr >>> Scanning sources... >>> Finished scanning sources >>> INFO: [IP_Flow 19-234] Refreshing IP repositories >>> INFO: [IP_Flow 19-1704] No user IP repositories specified >>> INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. >>> open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = 117689 >>> # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress >>> WARNING: [Common 17-1361] You have specified a new message control rule that is equivalent to an existing rule with attributes ' -ruleid {8} -id {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. >>> # reset_run synth_1 >>> # reset_run impl_1 >>> # launch_runs synth_1 >>> ERROR: [Common 17-70] Application Exception: Failed to launch run 'synth_1' due to failures in the following run(s): >>> axi_uart16550_0_synth_1 >>> axi_bram_ctrl_1_synth_1 >>> axi_bram_ctrl_0_synth_1 >>> axi_bram_ctrl_2_synth_1 >>> mig_7series_0_synth_1 >>> axi_clock_converter_0_synth_1 >>> clk_wiz_0_synth_1 >>> clk_wiz_1_synth_1 >>> These failed run(s) need to be reset prior to launching 'synth_1' again. >>> >>> INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... >>> Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit' failed >>> make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] Error 1 >>> >>> Best, >>> Jawad Haj-Yahya >>> >>>> On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: >>>> Dear Jawad, >>>> >>>> Please try the following sequence of commands and let me know where it fails ... >>>> >>>> (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) >>>> >>>> (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your net setup might be different) >>>> sudo apt-get install autoconf automake autotools-dev curl libmpc-dev libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev libelf-dev python-dev microcom >>>> source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you installed Vivado >>>> unset LD_LIBRARY_PATH >>>> git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/lowrisc-chip.git lowrisc-chip-ethernet-v0.5 >>>> cd lowrisc-chip-ethernet-v0.5 >>>> source set_env.sh >>>> sh $TOP/riscv-tools/fetch_and_patch_linux.sh >>>> cd $TOP/riscv-tools/ >>>> ./build.sh >>>> cd riscv-gnu-toolchain/build >>>> ../configure --prefix=$RISCV >>>> make -j$(nproc) linux >>>> cd $TOP/fpga/board/nexys4_ddr >>>> make bitstream >>>> make cfgmem >>>> make program-cfgmem >>>> >>>> (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p /dev/ttyUSB1 in another window) >>>> make etherboot >>>> >>>> >>>>> On 19/12/17 08:02, Jawad Haj-Yahya wrote: >>>>> Hi Jonathan, >>>>> >>>>> Do you have link to the branch that you mentioned: there is an ethernet-v0.5 branch with a preliminary version of this functionality ... >>>>> >>>>> One more question please regarding the following IP :https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I heard that there might be issue to include VHDL code with lowrisc 0.4, how this was handled? >>>>> >>>> You are right VHDL files cannot be used with Verilator. I am only using one file from pkerling which I partially manually translated to Verilog >>>>> >>>>> Best, >>>>> Jawad Haj-Yahya >>>>> >>>>>> On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote: >>>>>> Hi Jawad, >>>>>> This is something several people have been asking for and indeed there is an ethernet-v0.5 branch with a preliminary version of this functionality. There is no documentation yet but you can consult the archives of this mailing list for preliminary instructions. It won’t affect you I don’t think but the release and documentation is delayed until some issues with license compatibility are resolved. By the way there are some generic instructions on our website as to how to add peripherals which you may care to review for learning purposes. >>>>>> >>>>>> Regards, >>>>>> Jonathan >>>>>> >>>>>> Sent from my iPhone >>>>>> >>>>>> > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: >>>>>> > >>>>>> > Hello, >>>>>> > >>>>>> > Could you please help with instructions on how to add support for Ethernet >>>>>> > port to the latest lowrisc (0.4)? >>>>>> > >>>>>> > >>>>>> > Best, >>>>>> > Jawad Haj-Yahya >>>>>> >>>>> >>>> >>> >> > > -- > Best, > Jawad Haj-Yahya >

Reply

Jawad Haj-Yahya

5:37 p.m.

Thanks a lot Jonathan, we will try this. Really appreciate your help. Best, Jawad Haj-Yahya On Thu, Dec 21, 2017 at 3:46 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:

This Makefile assumes your nexys4ddr is directly or indirectly connected to eth0 (a physical Ethernet port, 100baseT on your build box in the 192.168.0.* region. There are a number of ways to satisfy this requirement such as purchasing a second Ethernet port or using a home hub and/or modifying the Ethernet device name in the Makefile. Start by running: /sbin/ifconfig -a This build system was tested with host=192.168.0.53, target=192.168.0.51 These settings can be changed but the easy option is the second port or a laptop with Ethernet and Wifi. The home hub option allows routing to the outside world which is very useful. In this preview the IP addressing is fixed for booting over Ethernet and NFS root. The alternative using SD card for root can use DHCP for networking, but your IT manager might not be too happy with an FPGA board plugged directly into the VLAN. Sent from my iPhone On 21 Dec 2017, at 02:33, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: Hi Jonathan, After fixing the licence issue, the chip_top.bit file was succesfully created but make etherboot step gives some error. we still see the following error: ubuntugs01:~/lowrisc-chip-ethernet-v0.5/fpga/board/nexys4_ddr$ make etherboot ../../common/script/recvRawEth -r eth0 boot0001.bin File = boot0001.bin, len = 5272272, chunks = 5149 MD5 sum = b35cd8c494e423962b3475c32dfd8d1c SO_BINDTODEVICE: No such device Makefile:218: recipe for target 'etherboot' failed make: *** [etherboot] Error 1 Any idea why this failure? Best, Jawad Haj-Yahya On Wed, Dec 20, 2017 at 5:51 PM, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: > Hi Jonathan, > > Thanks a lot for the promoted answer, we have fixed the license issue and > we are retrying, will update soon. > > Thanks, > Jawad > > On Wed, Dec 20, 2017, 4:44 PM Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> > wrote: > >> Dear Jawad, >> >> It looks like Vivado is failing to build the standard IP. The most >> likely reason is that your workstation lacks the license for webpack which >> is needed. You need to follow the procedure on the Xilinx website to >> install a license. Alternatively if you work for a company or educational >> institution it may have a site license which you can point to with an >> environment variable. To get detailed information about the errors, run >> 'make vivado' in the same directory that you ran 'make bitstream' and the >> GUI will open. You will see a window with a detailed list of errors. If >> license error is mentioned you can launch the license manager from the help >> menu and see your license status. If there is still doubt try running >> Vivado with one of the example designs that comes with it that is known to >> work. Problems with Vivado are not really covered by our website because >> there is comprehensive information on Xilinx's own website. >> >> Regards, >> >> Jonathan >> >> On 20/12/17 03:31, Jawad Haj-Yahya wrote: >> >> Hi Jonathan, >> >> Thanks a lot for the detailed mail. We have tried the instructions and >> we are facing the following failure in the compilation, could you please >> take a look: >> >> ubuntugs01:~/ethernet/lowrisc-chip/fpga/board/nexys4_ddr$ make bitstream >> vivado -mode batch -source ../../common/script/make_bitstream.tcl >> -tclargs lowrisc-chip-imp >> >> ****** Vivado v2015.4 (64-bit) >> **** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015 >> **** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015 >> ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved. >> >> source ../../common/script/make_bitstream.tcl >> # set origin_dir "." >> # set project_name [lindex $argv 0] >> # set orig_proj_dir [file normalize $origin_dir/$project_name] >> # open_project $orig_proj_dir/$project_name.xpr >> Scanning sources... >> Finished scanning sources >> INFO: [IP_Flow 19-234] Refreshing IP repositories >> INFO: [IP_Flow 19-1704] No user IP repositories specified >> INFO: [IP_Flow 19-2313] Loaded Vivado IP repository >> '/home/ssarkar/Xilinx/Vivado/2015.4/data/ip'. >> open_project: Time (s): cpu = 00:00:04 ; elapsed = 00:00:06 . Memory >> (MB): peak = 993.051 ; gain = 83.547 ; free physical = 162 ; free virtual = >> 117689 >> # set_msg_config -id "\[IP_Flow 19-3664\]" -suppress >> WARNING: [Common 17-1361] You have specified a new message control rule >> that is equivalent to an existing rule with attributes ' -ruleid {8} -id >> {[IP_Flow 19-3664]} -suppress '. The existing rule will be replaced. >> # reset_run synth_1 >> # reset_run impl_1 >> # launch_runs synth_1 >> ERROR: [Common 17-70] Application Exception: Failed to launch run >> 'synth_1' due to failures in the following run(s): >> axi_uart16550_0_synth_1 >> axi_bram_ctrl_1_synth_1 >> axi_bram_ctrl_0_synth_1 >> axi_bram_ctrl_2_synth_1 >> mig_7series_0_synth_1 >> axi_clock_converter_0_synth_1 >> clk_wiz_0_synth_1 >> clk_wiz_1_synth_1 >> These failed run(s) need to be reset prior to launching 'synth_1' again. >> >> INFO: [Common 17-206] Exiting Vivado at Wed Dec 20 11:19:40 2017... >> Makefile:147: recipe for target 'lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit' >> failed >> make: *** [lowrisc-chip-imp/lowrisc-chip-imp.runs/impl_1/chip_top.bit] >> Error 1 >> >> Best, >> Jawad Haj-Yahya >> >> On Tue, Dec 19, 2017 at 8:27 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> >> wrote: >> >>> Dear Jawad, >>> >>> Please try the following sequence of commands and let me know where it >>> fails ... >>> >>> (I am using Ubuntu 16.04.3 LTS, you may need to adjust appropriately) >>> >>> (I am using HWaddr EE:E1:E2:E3:E4:E5 and inet addr:192.168.0.51, your >>> net setup might be different) >>> >>> sudo apt-get install autoconf automake autotools-dev curl libmpc-dev >>> libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo gperf >>> libncurses5-dev libusb-1.0-0 libboost-dev swig git libtool libreadline-dev >>> libelf-dev python-dev microcom >>> source /opt/Xilinx/Vivado/2015.4/settings64.sh # or wherever you >>> installed Vivado >>> unset LD_LIBRARY_PATH >>> git clone -b ethernet-v0.5 --recursive https://github.com/lowrisc/low >>> risc-chip.git lowrisc-chip-ethernet-v0.5 >>> cd lowrisc-chip-ethernet-v0.5 >>> source set_env.sh >>> sh $TOP/riscv-tools/fetch_and_patch_linux.sh >>> cd $TOP/riscv-tools/ >>> ./build.sh >>> cd riscv-gnu-toolchain/build >>> ../configure --prefix=$RISCV >>> make -j$(nproc) linux >>> cd $TOP/fpga/board/nexys4_ddr >>> make bitstream >>> make cfgmem >>> make program-cfgmem >>> >>> (set nexys4-ddr to QSPI mode and reconfigure, start microcom -p >>> /dev/ttyUSB1 in another window) >>> >>> make etherboot >>> >>> >>> On 19/12/17 08:02, Jawad Haj-Yahya wrote: >>> >>> Hi Jonathan, >>> >>> Do you have link to the branch that you mentioned: there is an >>> ethernet-v0.5 branch with a preliminary version of this functionality >>> ... >>> >>> One more question please regarding the following IP : >>> https://github.com/pkerling/ethernet_mac , it's implemented in VHDL, I >>> heard that there might be issue to include VHDL code with lowrisc 0.4, how >>> this was handled? >>> >>> You are right VHDL files cannot be used with Verilator. I am only using >>> one file from pkerling which I partially manually translated to Verilog >>> >>> >>> Best, >>> Jawad Haj-Yahya >>> >>> On Mon, Dec 18, 2017 at 2:45 PM, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> >>> wrote: >>> >>>> Hi Jawad, >>>> This is something several people have been asking for and indeed >>>> there is an ethernet-v0.5 branch with a preliminary version of this >>>> functionality. There is no documentation yet but you can consult the >>>> archives of this mailing list for preliminary instructions. It won’t affect >>>> you I don’t think but the release and documentation is delayed until some >>>> issues with license compatibility are resolved. By the way there are some >>>> generic instructions on our website as to how to add peripherals which you >>>> may care to review for learning purposes. >>>> >>>> Regards, >>>> Jonathan >>>> >>>> Sent from my iPhone >>>> >>>> > On 18 Dec 2017, at 02:36, Jawad Haj-Yahya <jawadhy(a)gmail.com> wrote: >>>> > >>>> > Hello, >>>> > >>>> > Could you please help with instructions on how to add support for >>>> Ethernet >>>> > port to the latest lowrisc (0.4)? >>>> > >>>> > >>>> > Best, >>>> > Jawad Haj-Yahya >>>> >>>> >>> >>> >> >> -- > > Best, > Jawad Haj-Yahya >

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Dr Jonathan Kimmitt

Saturday, 13 January Sat, 13 Jan

12:35 a.m.

I am pleased to announce that the released ethernet-v0.5 branch of LowRISC was made available today complete with pre-tested binaries. Previously discussed license conflicts have been removed and various bugs fixed as well as MAC address filtering and MAC address selection to allow multiple LowRISCs to coexist on one network. This is not the ARM-killer, but for anyone who dislikes the prospect of purchasing a license before they even know what their R&D problem is, this little architecture and its many independent incarnations now have a tremendous Rocket behind them. Could be just what you need for your next IoT project. On 18/12/17 02:36, Jawad Haj-Yahya wrote:

Hello, Could you please help with instructions on how to add support for Ethernet port to the latest lowrisc (0.4)? Best, Jawad Haj-Yahya

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participants (6)

Alain Toussaint
Alex Bradbury
Dr Jonathan Kimmitt
Jawad Haj-Yahya
Luke Kenneth Casson Leighton
Michael Clark