The next release is the Ethernet release. It will not include any processor update, even
though there is a bundle of interesting stuff in there. I think you should be looking at
spike or qemu simulation to debug your problem initially, then move onto Verilog
simulation, and finally FPGA emulation. The development branch for the new Rocket is
called update and my work in progress is on update-jrrk2 branch.
Sent from my iPhone
On 23 Dec 2017, at 21:31, Armia Salib <armiasalib(a)yahoo.com>
wrote:
Hi Dr. Jonathan,
Thank you, Dr. Jonathan, for your quick reply.
I am able to instantiate two tiles after disabling the FPU. With those two tiles I am
able to run a Linux without SMP support. But it did not boot also with the SMP.
Do you suggest to wait for the next release of LowRISC? When will it be available?
Best regards,
Armia
--------------------------------------------
On Sat, 12/23/17, Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk> wrote:
Subject: Re: [lowrisc-dev] SMP support
To: "Armia Salib" <armiasalib(a)yahoo.com>
Cc: lowrisc-dev(a)lists.lowrisc.org
Date: Saturday, December 23, 2017, 9:09 PM
It goes without saying you need
at least two cores to get a benefit and there are some
questions over the reliability of tilelink1, hence the move
to tilelink2 in the new Rocket (porting to LowRISC in
progress, does not yet boot Linux. This kind of debugging is
for experienced developers.
Sent from my iPhone
>
On 23 Dec 2017, at 20:03, Armia Salib <armiasalib(a)yahoo.com>
wrote:
>
> Hello
all,
>
> I tried to
enable the SMP feature on Linux by modifying the Linux
configurations to support up to two cores. However, I tried
to run this modified Linux on LowRISC V0.3 without any other
modifications, however, the Linux boot did not boot
successfully. So, my question is, is SMP supported in V0.3?
What are other modifications I may need?
>
> Best regards,
> Armia
>