9:10 p.m.
http://libre-riscv.org/shakti/m_class/sdmmc/
ok so i am talking to rudolf from asics.ws, and for the shakti m_class
core it needs to have eMMC. would it be of interest to lowRISC to
have eMMC (8-bit SD/MMC), and if so would the CIC behind lowRISC be
interested to share the development cost for rudolf's time?
if yes i can specifically ask him to start from ethernet-v0.5 (or
other suitable branch). i may ask him that anyway as it's likely the
easiest (libre-licensed) stack to work with.
l.
p.s. there *is* a linux kernel driver for the sd/mmc interface, right?
:) it doesn't have to be absolutely up-to-date / mainline, it just
has to "work".
11:30 p.m.
Dear Luke,
The 8-bit mode of eMMC requires 1.8V signalling and this is not supported on the
Nexys4DDR. You can port to new hardware but this will take significant effort. The Linux
driver was rewritten and simplified for Ethernet-v0.5 so this would be the best branch to
start from. Signal integrity is an issue on this board but there may be scope to boost the
performance in software with multiple block commands and clock frequency tweaking.
Sent from my iPhone
On 28 Feb 2018, at 20:10, Luke Kenneth Casson Leighton
<lkcl(a)lkcl.net> wrote:
http://libre-riscv.org/shakti/m_class/sdmmc/
ok so i am talking to rudolf from asics.ws, and for the shakti m_class
core it needs to have eMMC. would it be of interest to lowRISC to
have eMMC (8-bit SD/MMC), and if so would the CIC behind lowRISC be
interested to share the development cost for rudolf's time?
if yes i can specifically ask him to start from ethernet-v0.5 (or
other suitable branch). i may ask him that anyway as it's likely the
easiest (libre-licensed) stack to work with.
l.
p.s. there *is* a linux kernel driver for the sd/mmc interface, right?
:) it doesn't have to be absolutely up-to-date / mainline, it just
has to "work".
6:56 p.m.
On 28 February 2018 at 20:10, Luke Kenneth Casson Leighton
<lkcl(a)lkcl.net> wrote:
http://libre-riscv.org/shakti/m_class/sdmmc/
ok so i am talking to rudolf from asics.ws, and for the shakti m_class
core it needs to have eMMC. would it be of interest to lowRISC to
have eMMC (8-bit SD/MMC), and if so would the CIC behind lowRISC be
interested to share the development cost for rudolf's time?
Hi Luke. It sounds like an interesting project and it would be great
to see a free implementation of support for this interface. However I
suspect 8-bit wide eMMC is far enough down our own list of priorities
(vs available funding) that it would be difficult to provide financial
support. If you'd like to discuss more, please drop me an email
off-list.
Best,
Alex
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participants (3)
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Alex Bradbury -
Dr Jonathan Kimmitt -
Luke Kenneth Casson Leighton