Dear All, I started work at Cambridge University Computer Labs on 1st July. Since then I have implemented a patch to allow lowrisc Linux to run on the Nexys-video boards from Digilent. This is beneficial because the FPGA has around double the CLBs and 4 times the amount of DDR memory. However it has other changes which are not so beneficial, for example the UART lacks flow control which is a problem for the debugging sub-system and the Ethernet PHY interface is incompatible with Nexys4-ddr. The DDR interface is DDR3 instead of DDR2 so it needs a 4:1 instead of 2:1 clock rate conversion. The status of this board is uncertain going forward now, meanwhile I have started work on the Minion I/O subsystem which will most likely use an adapted Pulpino processor, though other candidates are possible. A related task is cleaning our database of proprietary Xilinx IP so that we can make a design which is suitable for the forthcoming tape out, and removing deprecated techniques such as latches from the designs. Because of the extra logic and routing for the Minion sub-system it will be limited to running on the XC705 for now, however working with the Minion system on its own is possible on our standard boards. Regards, Jonathan