Hi,
On 05/30/2018 04:26 PM, Imran Wali wrote:
Hi,
I am trying to run a debug session on FPGA as described on
http://www.lowrisc.org/docs/debug-v0.3/fpga/.
After programming the nexys4ddr board with the provided debug enabled FPGA bitstream,
following error is encountered while trying to open the debug daemon:
$ opensocdebugd uart device=/dev/ttyUSB1 speed=12000000
Open SoC Debug Daemon
Backend: uart
opensocdebugd: ../../src/regaccess.c:60: osd_reg_read16: Assertion `packet[0] == 3'
failed.
Aborted (core dumped)
$
Could you please identify what's going wrong here.
this looks like a bug in GLIP that we already fixed. Could you try
updating the GLIP code in your lowrisc version to current master and try
again?
Best,
Philipp