[lowrisc-dev] BRAM logic in chip_top.sv
One of the things I would like to do with LowRISC is a clean separation of
structural and behavioural logic to eventually use IP-XACT or other
configuration formats to easier build modular designs
In chip_top.sv I found a big chunk of logic that seems to be related to
creating an boot memory.
Could someone please enlighten me what this code is supposed to do? I can't
really figure out from looking at the source, and the elaborated design
doesn't provide any addtional clues.
//Olof