Fwd: [lowrisc-dev] Multiple Rockets and Minions memory hierarchy
by Daniel Follesø
Hi.
Regarding the Nexys Video card I see two possibilities for an improved
debug link. The DPTI/ DSPI link (See section 7 of "https://reference.
digilentinc.com/_media/nexys-video:nexys_video_rm.pdf")
I have run some basic loopback tests over DPTI at speed up to 5 MB/s using
the demo that comes with Digient ADEPT 2. Have also found a an AXI
component of DPTI Written in VHDL :"https://github.com/Digilent/
vivado-library/tree/master/ip/AXI_DPTI_1.0". Drivers for the FT2232H chip
is needed. FTDI makes their closed drivers "D2XX". An open alternative is
"libFTDI".
Here is a "proof of consept" that got me started:
"*http://steckdenis.be/post-2016-06-25-fast-usb-connection-on-the-nexys-video-using-ft2232h.html
<http://steckdenis.be/post-2016-06-25-fast-usb-connection-on-the-nexys-vid...>*
".
In addition i have looked at Ethernet interface with the card. Have found
some resources on git specifically targets the Nexys Video Ethernet module.
These are described using VHDL, so might need some rewriting. I have some
experience working with VHDL and have done some translation from verilog to
VDHL av few years ago.
Just some thoughts on ways to get support for the much more capable Nexys
Video.
--Daniel
2017-05-30 19:14 GMT+02:00 Dr Jonathan Kimmitt <jrrk2(a)cam.ac.uk>:
> The target board for the minion-v0.4 release is Nexys-4DDR. We had to cut
> out some optional features for this board. Unfortunately the next low cost
> board in the same series, the Nexys-Video, lacks flow control on its UART,
> which causes problems for the trace debugger. Our build system in principle
> supports SMP rocket systems that share L2-cache and DDR memory, coherence
> is managed by TileLink. I don't think anybody has built it for FPGA
> recently.
>
> Regards,
> Jonathan Kimmitt
> LowRISC team member
>
> Sent from my iPhone
>
> > On 30 May 2017, at 17:33, Tobias Strauch <tobias(a)cloudx.cc> wrote:
> >
> > Hi guys,
> >
> > may I add a question to the one below:
> >
> > 3) I know it has mentioned a few months ago, but what would be the
> target virtex eval board for the next lowrisc release. maybe Wei mentioned
> it (and the questions below) at the WS, but the sound is terrible.
> >
> > thank you for your answer in adcance, see you in Hebden Bridge, cheers,
> Tobias
> >
> >
> >> Tobias Strauch <tobias(a)cloudx.cc> hat am 17. April 2017 um 12:39
> geschrieben:
> >>
> >>
> >> Hi Rob et al.,
> >>
> >> thank you for sharing an update on your wonderful project at the RISC-V
> WS in Munich.
> >>
> >> I’ve been following the lowRISC project closely and I was wondering, if
> I may ask you two questions.
> >>
> >> 1) Support for (many) MultiCores (except the Minions):
> >>
> >> Are you still planning to go for a solution, that supports multiple
> cores of the same kind (except the Minion Cores Network), so let’s say,
> multiple rockets, multiple BOOMs etc. I’m particular interested in how you
> solve the cache coherence\software\OS software problems that come with it.
> >>
> >> 2) Minions and local memory
> >>
> >> Will you attach local memory to the individual minions, and if so, how
> will your global memory hierarchy look like?
> >>
> >> Thank you so much in advance for your answers.
> >>
> >> Cheers, Tobias
> >>
> >> PS: Can’t wait to work with your next release.
> >>
> >> PPS: I think the survey on the RISC-V cores you mentioned is highly
> appreciated.
> >>
> >
>
>
5 years, 8 months
Porting TileLink2 to LowRISC
by Sean Halle
Hello,
Thanks for LowRISC and this community. I am writing with a question
about porting and upstreaming to the LowRISC distro. Some background on
the question -- we are producing a high performance low power processor
core -- 30% higher performance than Xeon E5-4667 core, at around 100x lower
power. Based on this, our server replaces 60 Intel based servers on
compute intensive tasks, while costing 6 times less and consuming 25 times
less electricity.
As part of this, we have been approached by a potential partner who has
processor optimization technology. They want to cut a deal with us, to use
their system. However, their system relies upon TileLink2.
The issue is that we are based on LowRISC and plan to continue with the
LowRISC distribution to the end.
So, as a compromise they are proposing to port TileLink2 to LowRISC.
The question we have for the list is what do people think about the porting
and then upstreaming? If we resolve the Chisel2 vs Chisel3 part, then
would it be a viable option for them to send a pull request and have the
port become a permanent part of the LowRISC distro?
Thanks for all you do,
Sean
Intensivate
http://intensivate.com
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5 years, 8 months
Re: Fwd: Re: [lowrisc-dev] FPGA Recommendation
by Stefan Wallentowitz
Hi Daniel!
(back to mailing list)
On 16.06.2017 06:04, Daniel Follesø wrote:
> I have been doing some digging on the Nexys Video board, and have 3
> separate plans that should make the board capable of fast communication
> with the Host PC.
Awesome. Are you aware that we use a side project of mine for host
communication? http://glip.io.
> 1) DPTI/ DSPI via prog port. See the Nexys Video reference manual for a
> quick overview( I can send you lots of links for docs and demo projects
> from Digilent if you think this might be sufficient). I have done some
> initial loop-back tests reaching 5 MB/s using DPTI. Requires drivers
> from FTDI or libFTDI.
Cool, didn't have a look at this so far, but it is always preferable to
use something on-board.
> 2) Simple Ethernet link with host. Here is an example I would like to
> try out and maybe try to rewrite in SV/ Verilog:
> *https://github.com/hamsternz/FPGA_GigabitTx*
> A more long term solution might be to do something like
> this:*https://github.com/hamsternz/FPGA_Webserver*
Excellent, I have also considered this and discussed with Wei and
Jonathan. The problem is more on the MAC side actually, there are plenty
of them available, but I couldn't figure out which one always works. The
Xilinx MAC is quite costy unfortunately..
Maybe it is worth creating a small Github repo to collect an overview of
open source ethernet cores and on which FPGAs they have been tested.
> 3) Use the FMC connector on the board with an FMC to USB 3 board like
> one of these( I think this might be the best long term solution):
> *https://www.digikey.com/catalog/en/partgroup/ft600-and-ft601-evaluation-boards/55950*
> *http://www.cypress.com/documentation/development-kitsboards/cyusb3acc-005-fmc-interconnect-board-ez-usb-fx3-superspeed
> *
> +
> *http://www.cypress.com/documentation/development-kitsboards/cyusb3kit-003-ez-usb-fx3-superspeed-explorer-kit*
This is what we actually already did :) The FX3 is now part of the GLIP
project and Wei and I have experimented before with it on the KC705
board. Unfortunately, the trace lengths are messed up and we had issues
reaching the limit of 200 MBit/s, but it looks better on the VCU108,
that Max and Philipp at TUM develop on.
Apparently, not a hobbyist board. As I don't have a Nexys4 Video I was
not able to test it so far. I should get one..
I also have an FT600 evaluation board here, but never got at it, because
it only has the proprietary driver from FTDI. Also, I don't understand
why they didn't spent some logic on a single GPIO pin. GLIP standardizes
a FIFO interface plus a reset GPIO pin to better allow remote setups.
This reset pin is quite handy, and the FX3 is overall just the more
elegant (yet more costy) choice.
> The Nexys Video have good student pricing and in my mind a good
> alternative for the lowRISC project.
Yes, the academic pricing is great and it has plenty of user I/O. I
still don't own one, but will get one the next weeks I think. Do you
already have one?
> Regarding alternatives with an Artix-7 200T FPGA, what do you think of
> the ZTEX "USB-FPGA Module 2.18b"?
> *https://shop.ztex.de/product_info.php?cPath=25&products_id=99*
I love the ZTEX boards. At university we have used them for ages. They
just work and the FX3+Artix 200 is just a charme (despite its price).
For my other project (optimsoc.org) it is the natural candidate, because
it really focuses on the manycore system-on-chip and I/O is not a
critical issue (can be emulated if needed). Anyways, for lowRISC the
ZTEX was also in discussion, but the I/O (and price) made the Nexys 4
DDR the more sensible choice.
GLIP should work out of the box on the ZTEX board. I will probably order
one soon and just test it out.
In the same class the micro modules (4x5 cm) from Trenz Electronics are
also quite neat, but I don't find a USB3 base board.
Cheers,
Stefan
5 years, 9 months
Ethernet Support
by Sean Halle
Hi,
We are implementing a low power high performance RISC-V core, and
building upon the LowRISC distribution. Thank you for everything you are
contributing.
We have a single core version of our chip, based on LowRISC, up and
running Linux. We would like to start a server on it, and set it up on the
internet, that potential customers can log into.
We noticed that there are plans to add ethernet to LowRISC, with a
driver for Linux. Is there any update on the status? We are interested in
this, and would like to work together with anyone moving this forward.
Thank you,
Sean
Intensivate
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the reader of this e-mail is not the intended recipient, or the employee,
agent or representative responsible for delivering the e-mail to the
intended recipient, you are hereby notified that any dissemination,
distribution, copying or other use of this e-mail is strictly prohibited.
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sender. Thank you.
5 years, 9 months
Fwd: Re: [lowrisc-dev] FPGA Recommendation
by Wei Song
Forget to cc mail-list. -Wei
-------- Forwarded Message --------
Subject: Re: [lowrisc-dev] FPGA Recommendation
Date: Fri, 9 Jun 2017 16:07:15 +0100
From: Wei Song <ws327(a)cam.ac.uk>
To: Tobias Strauch <tobias(a)cloudx.cc>
So here is a list of boards we support right now:
tagged-memory-v0.1: ZedBoard (obsolete)
untether-v0.2: Nexys4-DDR / KC705
debug-v0.3: Nexys4-DDR / Zedboard (need a USBUART Pmod)
minion-v0.4: Nexys4-DDR
We still want to keep using Nexys4-DDR due to its low price.
Honest speaking, it becomes difficult as the LUT consumption is around
90% for minion-v0.4 (one rocket + one PULP).
Jonathan has tried the Nexys-Video board but with issues in UART and
QSPI Flash if I remember it right.
VC707 or KC705 is too expensive for most people, so even if we support
it, another low-cost board should be chosen as well.
Hopefully there is no need to change in the near future; however, if we
must, I do not have a clear answer right now.
-Wei
On 09/06/2017 05:18, Tobias Strauch wrote:
> Wei, I try to follow statements from the lowRISC guys closely, but I’m still puzzled:
>
> What is the demo installation board for your next release, if you want to use all the beautiful features (tagged, minions, debug), that come with it ? I think Alex mentioned the vc707 at the 5th WS, but please confirm.
>
> Thanks a lot, Tobias
>
> PS: Looking forward to your release ...
>
>
>> Wei Song <ws327(a)cam.ac.uk> hat am 8. Juni 2017 um 11:20 geschrieben:
>>
>>
>> Hello Alisson,
>>
>> This is not a direct recommendation but just a note.
>> We do not support the Xilinx zc706 dev board. To be more specific, we do
>> not direct support any Zynq FPGA after our 2016 releases. Recently
>> Furkan has ported out debug-v0.3 to Zedboard, but the ARM core is not used.
>>
>> For lowRISC, we would recommend pure FPGA dev boards which use Kintex or
>> Virtex FPGAs.
>> The recommended board right now is Nexys4-DDR, which still has around
>> 30% area left if you get rid of the tagged memory, minion and trace
>> debugger. I think this might be enough to have a BOOM core replacing the
>> Rocket one.
>> The price for Nexys4-DDR is around 320 USD from Digilent.
>>
>> Best regards,
>> Wei
>>
>>
>> On 07/06/2017 21:53, Alisson Linhares wrote:
>>> Hi everyone,
>>>
>>> I want to buy an FPGA board to work with LowRISC. However, the FPGA needs
>>> to be large enough to fit a BOOM core. The zc706 is too expensive for me.
>>> Therefore, I'm looking for a cheaper alternative.
>>>
>>> Does anyone have any suggestion?
>>>
>>> Thanks.
>>
5 years, 9 months
FPGA Recommendation
by Alisson Linhares
Hi everyone,
I want to buy an FPGA board to work with LowRISC. However, the FPGA needs
to be large enough to fit a BOOM core. The zc706 is too expensive for me.
Therefore, I'm looking for a cheaper alternative.
Does anyone have any suggestion?
Thanks.
5 years, 9 months
GSoC blog posts
by Jonathan Neuschäfer
Hi,
I'm interested in reading what lowRISC's GSoC students are doing this
year. Where should I look?
Jonathan Neuschäfer
5 years, 9 months
