[GSOC] Arduino to PULPino library porting
by Mahmoud Elmohr
Hi everyone,
At first, let my introduce my self; My name is Mahmoud Elmohr, I'm a
student at faculty of engineering, Alexandria University. I was accepted at
Google Summer of Code for a project under the umbrella of lowRISC community
and I want to share my project details and plan with you.
My project is about porting Arduino libraries to PULPino, Importing Arduino
Libraries to PULPino architecture should introduce both PULP and RISC-V to
the massive Arduino community and would benefit in educational purposes.
My Plan is to implement Microcontroller Abstraction Layer (MCAL) first
which includes GPIO and other peripherals such as timers, UART, SPI and I2C
and simulate it using ModelSim.
The next step would be implementing as much as possible of the popular
Hardware Abstraction Layer (HAL) drivers such as Servo motor, stepper
motor, LCD and SD drivers and test simple tests on FPGA.
The final step is to integrate the RISC-V compiler and the ported libraries
to Arduino IDE to allow direct development for Arduino users.
If time permits, I will try to port the Arduino boot-loader to PULPino.
I hope that this project would contribute to the open
hardware community and I'm looking forward to hearing your reviews and
suggestions about my project so I put them in consideration.
Regards
Mahmoud Elmohr
7 years, 1 month
[GSoC] Implementing an open-source DDRx controller
by Bittu N
Hello everyone,
My name is Bittu. I'm a senior at BITS-Pilani, Goa, India, studying
Electronics and Physics. I'll be working with lowRISC over the summer
as part of Google Summer Of Code. I'll be implementing an AXI4
compatible DDRx memory controller, under the guidance of my mentor Dr.
Wei Song.
I hope that my work benefits the lowRISC organisation and other
projects with similar needs. I plan on using the community bonding
period to gain further insight into the requirements and discuss
architectural tradeoffs. I would also like to use this period to get
accustomed to the way lowRISC operates.
Please feel free to pitch in with ideas and suggestions. It will be
good having more than a few pairs of eyes looking at this project. I
will share my progress on my blog, perhaps on a weekly basis.
The other projects look very exciting. I hope that all of us are able
to accomplish our goals.
Thank You
--
Bittu (diadatp)
7 years, 1 month
[GSoC] Porting musl libc to RISC-V
by Masanori Ogino
Hello,
I'm a master's student in Japan majoring in informatics. In this year,
my proposal for lowRISC has been accepted as part of Google Summer of
Code, so I'd like to introduce myself and the project I will work on.
You may have already discussed with me on the mailing lists, though
:-)
The goal of my project is completing a RISC-V port of musl
(http://www.musl-libc.org/), mentored by Rich Felker. I hope the
project could benefit the RISC-V community. Since musl has been used
by some lightweight/embedded Linux distributions including Alpine
Linux and OpenWrt, the project will be attractive especially for
embedded system developers, I guess.
The project aims not only adding RV-specific part of the libc, but
also integrating it into the toolchain. I also consider some
improvements to the kernel side interacting with libc (e.g. migrating
compare-and-swap emulation from system calls to vDSO functions) if
possible.
For details, you can get my proposal on GitHub:
https://github.com/omasanori/gsoc2016-proposal
I'm definitely new to the community though I have had interest in both
RISC-V and musl for years. Nice to meet you!
Any comments would be appreciated. I hope you will get excited at this
project too.
--
Masanori Ogino
7 years, 1 month
[GSoC] Porting the xv6 teaching operating system to the lowRISC platform
by Jeffrey Rogers
Hi everyone,
I wanted to introduce myself. My name is Jeff Rogers, I’m a senior at
Harvard studying computer science and math. I’m working on a lowRISC
related project this summer with Google Summer of Code. My project is to
port the xv6 teaching operating system to RISC-V. Xv6 is a small
teaching operating system based on 6th edition UNIX. It is written for
x86, but ports to the Raspberry Pi and other platforms exist. You can
find more about xv6 here: https://pdos.csail.mit.edu/6.828/2014/xv6.html.
Because xv6 is small and simple it is an ideal place to begin learning
about operating systems and how they interact with hardware. By porting
it to RISC-V we can get more people interested in the lowRISC platform
and provide them with a fun way to get started with it. As a side
benefit, my project will help make xv6 more portable. There are existing
ports to other platforms as I mentioned earlier, but they all just rip
out the x86 specific code and replace it with platform specific code.
I’m currently separating the machine dependent code and machine
independent code so that the x86 version and the RISC-V version can live
alongside one another. Additionally, these projects didn’t provide much
documentation on what changes they made or why, so I plan on writing
this as I work on the implementation. This should be especially useful
for things like the virtual memory implementation since RISC-V requires
a lot more of this to be done in software than x86 does.
I got the RISC-V tools working on my computer a few days ago and have
begun playing around with the compiler toolchain, assembler, etc. I
think I have a pretty good grasp of what needs to be done and how to go
about doing this, but if anyone has anything they think I should take a
look at or be aware of, I’m happy to hear about it!
Very excited to be working on this!
Jeff
7 years, 1 month
[GSoC] Porting OPTEE to the lowRISC platform
by rahul mahadev
Hi,
I am a 4th year student of Information Science at PES University, Bangalore
, India. I will be working with lowRISC this summer as a part of Google
Summer Of Code.
I'm being mentored by Stefan Wallentowitz and my project aims to port a
TEE(Trusted Execution Environment) to the RISC-V platform. We have looked
at OPTEE by Linaro as a reference point and hope to establish the
functionalities it provides. We have chalked out around three ways we could
do this.
1. Full port of OPTEE and effectively porting the entire ARM-Trusted
Firmware extensions also the ARM TrustZone features could be implemented
using minion cores.
2. Last year's GSOC had Hesham M. Almatary port a fully working seL4
imlpementation for RISC-V, I could use that and para-virtualize OPTEE and
the Normal World OS on top of seL4.
3. Third method is the most elegant one in which I write services in seL4
which will provide features required by a Global Platform compilant TEE.
As stated in my proposal I will utilize the community bonding period to
decide which approach to go for, It would also be great If I could get the
community's opinion. I find this project really interesting and hope it
could benefit the community. I will also be mainting a weekly blog , I will
share the link when it is ready.
Thank You
M <http://heshamelmatary.blogspot.in/>
7 years, 1 month
Ethernet Support on the rocket FPGA implementation
by Pawan Reddy Sibbala
Hi Wei,
I have a question about ethernet support on the rocket FPGA implementation
( tethered and untethered versions ).
In the tethered version, it is mentioned that HTIF is used to service
system calls for peripheral device emulation. Can rocket core on the FPGA
send packets over the ethernet? I don't think it has support for it but I'm
trying to get a sense of what needs to changed/added to make this support?
Could you give your thoughts on how one can do this?
It seems like the untethered version has support for UART and SD card. How
different would it be to add ethernet support for this when compared to the
tethered version with HTIF?
Thanks,
Pawan
7 years, 1 month
RFC: Hardware implemented Hypervisor with device abstraction
by Reinoud Zandijk
Dear folks,
I'd like to present you all with a proposal for a Hardware implemented
Hypervisor. Its main benefits are that its virtually unhackable and has a
completely integrated debug facility.
Its not 100% done of course but the idea is worked out sufficiently enough to
share and RFC for the 1st round.
Hope to hear from you,
Reinoud Zandijk
7 years, 1 month
Can't execute SD card example on Nexys4 DDR
by Alexis Ramos Amo
Hello all,
I'm trying to run "SD card read test" (sdcard.c) on my Nexys4 DDR but I get the following error:
Fail to mount SD driver!
Error! exit (0x00.1)
The program is failing at the following line (in sdcard.c)
if(f_mount(&FatFs, "", 1))
I'm loading the bitstream from Quad-SPI Flash (the board is going to be re-configured several times, so I need the fastest programming procedure available). I get the same error loading it by PROG/UART, but I don't have any problem if I load the bitstream from microSD. The microSD HC is formatted on FAT32 (8GB).
I've changed the option _FS_READONLY to 0 in order to allow writing on the SD. Also I've tried to change the path of f_mount (like if(f_mount(&FatFs, "1:", 1)) without success.
. How can I read/write from SDCARD, if I load the bitstream from another different drive than the SD?
. Also, Could I write into SPI Flash memory (instead of sdcard) if the bitstream is loaded from flash?
Thank you for your help.
Alexis Ramos Amo
Researcher / PhD Student
Electronic Design and Space Technology group Nebrija University
Madrid
Spain
www.nebrija.com
7 years, 2 months
