I'm trying to run "SD card read test" (sdcard.c) on my Nexys4 DDR but I get the following error:
Fail to mount SD driver!
Error! exit (0x00.1)
The program is failing at the following line (in sdcard.c)
if(f_mount(&FatFs, "", 1))
I'm loading the bitstream from Quad-SPI Flash (the board is going to be re-configured several times, so I need the fastest programming procedure available). I get the same error loading it by PROG/UART, but I don't have any problem if I load the bitstream from microSD. The microSD HC is formatted on FAT32 (8GB).
I've changed the option _FS_READONLY to 0 in order to allow writing on the SD. Also I've tried to change the path of f_mount (like if(f_mount(&FatFs, "1:", 1)) without success.
. How can I read/write from SDCARD, if I load the bitstream from another different drive than the SD?
. Also, Could I write into SPI Flash memory (instead of sdcard) if the bitstream is loaded from flash?
Thank you for your help.
Alexis Ramos Amo
Researcher / PhD Student
Electronic Design and Space Technology group Nebrija University
I was wondering if there are modular tests available to test the
functionality of the onchip network in isolation in the uncore library? I
looked at the github rocket SoC generator repo and couldn't find anything.
Could you please me know how I can test the onchip network ( TileLink
Module for example ) in isolation if I make any changes to the existing
The GSOC deadline is over and I would not be able to submit a propsal,
however I would still like to contribute this independent of GSOC as I see
a strong opportunity to learn something valuable.
I went through the entire source code, but I was unable to find any
reference to Xilinx blocks in the source code. Is it generated from the
Chisel source code? Please provide pointers
I've finished a draft of my proposal to port the xv6 teaching
operating system to lowRISC. A plaintext version can be found at
I'd be glad if the lowRISC team could offer some comments and tell me if
any sections need clarification or further expansion.
My name is Paulo, and I am going to submit a proposal to work on lowRISK
(the "Integrate more open-source IP" project). However, I still have a
question: which toolchain should I install?
That said, I'm looking forward to work with you!
Paulo Nesello Künzel
First of all, congratulations to the lowrisc team for selection into
Google Summer of Code 2016.
I would like to participate to Google Summer of Code 2016 by
contributing to Improving device-tree support for the Linux RISC-V
port for lowRISC.
I have worked on Linux and device drivers and have experience of
working on different architectures like MIPS, ARM & x86.
I request you to kindly guide me as to how to get started with this project.
I’m a Ph.D student working on TLM standard and its application to non memory mapped interfaces, and mainly about protocols used in SoC. I’m interested in building a virtual platform for the lowRISC SoC based on the SystemC IEEE standard.
More and more project are developed using a top-down approach building first TLM LT models, then maybe AT,... until the RTL. Virtual platforms enable software developers to build drivers and test their code early using a virtual version. They bring software and hardware team to enable early software and early validation. As I can see, you’re talking in your "Plans for RISC-V in 2016 » presentation about SPI, I2C, I2S, UART IP, I think it would be interesting for the community to have a TLM LT level (for example) equivalent to ease hardware, driver development and testing.
What’s the interest of the community in such a project ? What about having an open source virtual platform based on the industry standard (IEEE 1666) ?
Let me know if you have any questions.
First of all, congratulations on being selected as an mentor of GSoC 2016.
I am Nguyen Ngoc Luong who is currently in my 2nd year of masters in
electrical and computer engineering program at Seoul national University,
Korea. My research interests include algorithm and hardware design for video
encoding and computer vision.
I am pretty proficient in programming C/C++ and Verilog. After spending
time researching about lowRISC, I found that I can contribute to the
project: "Generic hardware/software interface for software-defined radio".
I have experience of programming and designing processor using LISA
(Language for Instruction Set Architectures) and Processor Designer tool.
Also, I have been working with C/C++ and Verilog for more than 5 years.
It would be great if I can have chances to join one of lowRISC's GSoC
projects. Therefore, I am writing to introduce myself and express my
interest in joining lowRISC's GSoC 2016 "Generic hardware/software interface
for software-defined radio".
Thank you so much and I am looking forward to hearing from you soon
With best regards