Here is an update from the lowRISC project.
Over the past several months, we’ve been working to provide a standalone
or ‘untethered’ SoC. Cores in the original Rocket chip rely on
communicating with a companion processor via the host-target interface
(HTIF) to access peripherals and I/O. This release removes this
requirement, adding an I/O bus and instantiating FPGA peripherals. The
accompanying tutorial, written by Wei Song, describes how to build this
code release and explains the underlying structural changes. We support
both the Xilinx KC705 and the lower-priced Nexys4 DDR development
boards. We would gladly welcome assistance in supporting other boards.
Please note that the codebase temporarily lacks support for tagged
memory included in the previous release. We plan to re-integrate tagged
memory support with additional optimisations early next year. You can
find a detailed list of changes in the release notes. One highlight is
support for RTL simulation using the open-source Verilator tool.
We hope to see many of you at the 3rd RISC-V Workshop in January, where
Wei Song and Alex Bradbury will be presenting about lowRISC.
The release tutorial: http://www.lowrisc.org/docs/untether-v0.2/
Release note: http://www.lowrisc.org/docs/untether-v0.2/release/
Code release repo: https://github.com/lowRISC/lowrisc-chip/
Europractice is offering free MPW runs to European universities that
have never prototyped an ASIC (or a cheap 65nm run if you've never
tried 90nm or below).
More details here:
Sounds like a great initiative to encourage more groups to fab chips
(there's nothing more fun of course!).
Dear lowRISC team
We are a brand-new startup based in Shenzhen.
Our goal is to produce free and open source hardware.
Since we all share the enthusiasm for open source products, we were
enlightened to learn about your project.
We are very interested in a collaboration with our organization.
For example, we could take over the production of your first chip.
Right now, we are looking for an inexpensive chip manufacturer here in
Because we have access to the local manufacturing lines here in main land
China (thanks to the relations of friends who happen to be locals), we can
beat down the prices for the production of a prototype series enormously.
And we are confident that we can produce 100-200k chips for around 5$ each.
It's also possible for us to produce smaller amounts of chips because we can
share mask space with other engineers here.
So we could help you save money as well.
This would be interesting for you I guess, since it's a waste of time and
material (silicon) to produce 100k chips only to find out that you had an
unspotted hazard in your transistor layout somewhere.
With only a dozens of the chips it hurts less :-)
If you are interested into a cooperation with our start-up it would be very
helpfull for finding a suitable manufacturer if I knew whether you've already
finished the litographic masks and if yes, in which format and with which tool
Otherwise I could assist you with this as well.
We are looking forward to hearing from you
智宇 (Cedric), David and Cristoffel
http://lanceville.cn/zh/ (under construction)