Suggestion: Chip production
by Cristoffel Gehring
Dear lowRISC team
We are a brand-new startup based in Shenzhen.
Our goal is to produce free and open source hardware.
Since we all share the enthusiasm for open source products, we were
enlightened to learn about your project.
We are very interested in a collaboration with our organization.
For example, we could take over the production of your first chip.
Right now, we are looking for an inexpensive chip manufacturer here in
Shenzhen.
Because we have access to the local manufacturing lines here in main land
China (thanks to the relations of friends who happen to be locals), we can
beat down the prices for the production of a prototype series enormously.
And we are confident that we can produce 100-200k chips for around 5$ each.
It's also possible for us to produce smaller amounts of chips because we can
share mask space with other engineers here.
So we could help you save money as well.
This would be interesting for you I guess, since it's a waste of time and
material (silicon) to produce 100k chips only to find out that you had an
unspotted hazard in your transistor layout somewhere.
With only a dozens of the chips it hurts less :-)
If you are interested into a cooperation with our start-up it would be very
helpfull for finding a suitable manufacturer if I knew whether you've already
finished the litographic masks and if yes, in which format and with which tool
(e.g. qflow?)
Otherwise I could assist you with this as well.
We are looking forward to hearing from you
智宇 (Cedric), David and Cristoffel
http://lanceville.cn/zh/ (under construction)
7 years, 6 months
Re: lowrisc-dev Digest, Vol 14, Issue 6
by vivek pandya
*Vivek Pandya*
On Tue, Nov 24, 2015 at 5:30 PM, <lowrisc-dev-request(a)lists.lowrisc.org>
wrote:
> Send lowrisc-dev mailing list submissions to
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> Today's Topics:
>
> 1. Re: lowrisc-dev Digest, Vol 14, Issue 5 (Ivan Seminara)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Mon, 23 Nov 2015 21:24:08 +0000
> From: Ivan Seminara <ivanseminara(a)gmail.com>
> Subject: [lowrisc-dev] Re: lowrisc-dev Digest, Vol 14, Issue 5
> To: lowrisc-dev(a)lists.lowrisc.org
> Message-ID:
> <CAEoXWJ+92Q1u69mgSXtZUce8Sc_WNMMnydv5H+=
> 3A0mnpkqhRA(a)mail.gmail.com>
> Content-Type: text/plain; charset=UTF-8
>
> On Mon, Nov 23, 2015 at 6:33 PM, vivek pandya <vivekvpandya(a)gmail.com>
> > wrote:
> >
> > Hi Ivan,
> >
>
>
> > I have started looking into it by following lowRISC tagged memory
> > tutorial and also reading and watching tutorials on risc-v ISA and
> related
> > tools, if you like we can work together and As mentioned in the proposal
> > there are more possible work one LLVM is in this. Please share your
> > thoughts about it.
> >
> > Sincerely,
> > Vivek Pandya
> > ------------------------------
> > Date: Tue, 24 Nov 2015 01:26:37 +0530
> > From: vivek pandya <vivekvpandya(a)gmail.com>
> > Subject: [lowrisc-dev] Re: Please provide update on LLVM in lowRISC
> > To: lowrisc-dev(a)lists.lowrisc.org
> >
>
>
> > Hello ,
> >
> > I have came across recent presentation about update of lowrisc by Alex.
> > According to that LLVM pass for protecting code pointer with tagged
> memory
> > has been implemented.
> > Can anybody please provide update on that ? also what is the future work
> > required and if any body is working on it or not ?
> >
> > *Vivek Pandya*
> > ------------------------------
> > Date: Mon, 23 Nov 2015 20:09:23 +0000
> > From: Alex Bradbury <asb(a)asbradbury.org>
> > Subject: Re: [lowrisc-dev] Re: Please provide update on LLVM in
> > lowRISC
> > To: vivek pandya <vivekvpandya(a)gmail.com>
> >
> > On 23 November 2015 at 19:56, vivek pandya <vivekvpandya(a)gmail.com>
> wrote:
> >
> > Hi Vivek, Ivan,
> >
> > Apologies for the slow response. Matthew Toseland did some work on
> > this over the summer, producing a prototype implementation. You can
> > find notes about how far this got here:
> >
> >
> https://github.com/toad/riscv-llvm/blob/tag-code-pointers-tagged-register...
> > It's a proof of concept rather than a full implementation. We hope to
> > release more documentation on 1) what was done over the summer and 2)
> > plans for what remains to be done, but it's been difficult to find
> > time over the past few month or two.
> >
> > Best,
> >
> > Alex
> >
>
> Hi Vivek,
> As I said I'd love to be able to discuss the work with someone else, my
> university
> has plenty of GCC gurus but a distinct lack of LLVM experts, and working
> together
> we can accomplish more.
>
> I'm in a computer security course so it should be reasonably easy to
> coordinate
> so that we can both provide the original work we need.
>
> Thank you for the link Alex, looking into it.
>
> Sincerely,
> Ivan
>
> Hi Ivan ,
The link shared by Alex contains how to setup the required environment and
what are the bugs in current implementation , mean while I have contacted
to Matthew Toseland who has done this work and some part that required
modification of ISA is done by *Lucas Sonnabend *. I have forked Metthew's
riscv-llvm repository and he suggested to read about his work . I have
converted the LaTeX document to PDF , you can get it here
https://drive.google.com/file/d/0B9dbhMvDgdLaZHo3RHRMVFF4Vm8/view?usp=sha...
As the setup it self involves a lot of hack so I would suggest we should
begin by setup the whole environment followed by solving the bugs . The PDF
shared above is very important to understand the over all design and
details of work done previously . Also while solving the bugs we required
to understand many things like riscv, and tools simulators etc. After that
we can think about future work.
Sincerely,
Vivek
>
> ------------------------------
>
> _______________________________________________
> lowrisc-dev mailing list
> lowrisc-dev(a)lists.lowrisc.org
>
> http://listmaster.pepperfish.net/cgi-bin/mailman/listinfo/lowrisc-dev-lis...
>
>
> End of lowrisc-dev Digest, Vol 14, Issue 6
> ******************************************
>
7 years, 6 months
Re: lowrisc-dev Digest, Vol 14, Issue 5
by Ivan Seminara
On Mon, Nov 23, 2015 at 6:33 PM, vivek pandya <vivekvpandya(a)gmail.com>
> wrote:
>
> Hi Ivan,
>
> I have started looking into it by following lowRISC tagged memory
> tutorial and also reading and watching tutorials on risc-v ISA and related
> tools, if you like we can work together and As mentioned in the proposal
> there are more possible work one LLVM is in this. Please share your
> thoughts about it.
>
> Sincerely,
> Vivek Pandya
> ------------------------------
> Date: Tue, 24 Nov 2015 01:26:37 +0530
> From: vivek pandya <vivekvpandya(a)gmail.com>
> Subject: [lowrisc-dev] Re: Please provide update on LLVM in lowRISC
> To: lowrisc-dev(a)lists.lowrisc.org
>
> Hello ,
>
> I have came across recent presentation about update of lowrisc by Alex.
> According to that LLVM pass for protecting code pointer with tagged memory
> has been implemented.
> Can anybody please provide update on that ? also what is the future work
> required and if any body is working on it or not ?
>
> *Vivek Pandya*
> ------------------------------
> Date: Mon, 23 Nov 2015 20:09:23 +0000
> From: Alex Bradbury <asb(a)asbradbury.org>
> Subject: Re: [lowrisc-dev] Re: Please provide update on LLVM in
> lowRISC
> To: vivek pandya <vivekvpandya(a)gmail.com>
>
> On 23 November 2015 at 19:56, vivek pandya <vivekvpandya(a)gmail.com> wrote:
>
> Hi Vivek, Ivan,
>
> Apologies for the slow response. Matthew Toseland did some work on
> this over the summer, producing a prototype implementation. You can
> find notes about how far this got here:
>
> https://github.com/toad/riscv-llvm/blob/tag-code-pointers-tagged-register...
> It's a proof of concept rather than a full implementation. We hope to
> release more documentation on 1) what was done over the summer and 2)
> plans for what remains to be done, but it's been difficult to find
> time over the past few month or two.
>
> Best,
>
> Alex
>
Hi Vivek,
As I said I'd love to be able to discuss the work with someone else, my
university
has plenty of GCC gurus but a distinct lack of LLVM experts, and working
together
we can accomplish more.
I'm in a computer security course so it should be reasonably easy to
coordinate
so that we can both provide the original work we need.
Thank you for the link Alex, looking into it.
Sincerely,
Ivan
7 years, 6 months
Re: Please provide update on LLVM in lowRISC
by vivek pandya
Hello ,
I have came across recent presentation about update of lowrisc by Alex.
According to that LLVM pass for protecting code pointer with tagged memory
has been implemented.
Can anybody please provide update on that ? also what is the future work
required and if any body is working on it or not ?
*Vivek Pandya*
7 years, 6 months
Re: lowrisc-dev Digest, Vol 14, Issue 4
by vivek pandya
*Vivek Pandya*
On Mon, Nov 23, 2015 at 5:30 PM, <lowrisc-dev-request(a)lists.lowrisc.org>
wrote:
> Send lowrisc-dev mailing list submissions to
> lowrisc-dev(a)lists.lowrisc.org
>
> To subscribe or unsubscribe via the World Wide Web, visit
>
> http://listmaster.pepperfish.net/cgi-bin/mailman/listinfo/lowrisc-dev-lis...
>
> or, via email, send a message with subject or body 'help' to
> lowrisc-dev-request(a)lists.lowrisc.org
>
> You can reach the person managing the list at
> lowrisc-dev-owner(a)lists.lowrisc.org
>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of lowrisc-dev digest..."
>
>
> Today's Topics:
>
> 1. Re: lowrisc-dev Digest, Vol 14, Issue 3 (Ivan Seminara)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Sun, 22 Nov 2015 13:28:17 +0000
> From: Ivan Seminara <ivanseminara(a)gmail.com>
> Subject: [lowrisc-dev] Re: lowrisc-dev Digest, Vol 14, Issue 3
> To: lowrisc-dev(a)lists.lowrisc.org
> Message-ID:
> <
> CAEoXWJKT9UmC69UfZBB+tprbTcb41xjTQX-Vs-Z6_VUb-ASLMA(a)mail.gmail.com>
> Content-Type: text/plain; charset=UTF-8
>
> > Date: Sun, 22 Nov 2015 01:25:41 +0530
> > From: vivek pandya <vivekvpandya(a)gmail.com>
> > Subject: [lowrisc-dev] Re : LLVM pass for control-flow hijacking
> > protection using lowRISC?s tagged memory
> >
>
>
> > Hello LOWRISC community,
> >
> > I would like to implement this project. I am a CS graduate student and I
> > have little experience with writing LLVM optimization passes.
> > As per my understanding about this project , it requires to implement an
> > LLVM pass that will augment every code pointer with tags so that it is
> > interpreted as read only memory, also make loader(linux kernel for
> lowrisc)
> > to check while loading this code pointer that it is read only and
> > modification to this pointer would result in error.
> > This pass would be in RISC-V's llvm port and it will be executed while
> code
> > generation phase. This will be tested in any of the simulators mentioned
> in
> > tagged memory tutorial.
> >
> > Please provide your valuable feedback on this.
> >
> > Sincerely,
> > *Vivek Pandya*
> >
> > Hi Vivek,
> I'm in a similar position as yours and I've started looking into it. I'd
> like to be able to discuss it with someone else.
>
> Sincerely,
> Ivan Seminara
>
>
> ------------------------------
>
> _______________________________________________
> lowrisc-dev mailing list
> lowrisc-dev(a)lists.lowrisc.org
>
> http://listmaster.pepperfish.net/cgi-bin/mailman/listinfo/lowrisc-dev-lis...
>
>
> End of lowrisc-dev Digest, Vol 14, Issue 4
> ******************************************
>
7 years, 6 months
Re: lowrisc-dev Digest, Vol 14, Issue 3
by Ivan Seminara
> Date: Sun, 22 Nov 2015 01:25:41 +0530
> From: vivek pandya <vivekvpandya(a)gmail.com>
> Subject: [lowrisc-dev] Re : LLVM pass for control-flow hijacking
> protection using lowRISC?s tagged memory
>
> Hello LOWRISC community,
>
> I would like to implement this project. I am a CS graduate student and I
> have little experience with writing LLVM optimization passes.
> As per my understanding about this project , it requires to implement an
> LLVM pass that will augment every code pointer with tags so that it is
> interpreted as read only memory, also make loader(linux kernel for lowrisc)
> to check while loading this code pointer that it is read only and
> modification to this pointer would result in error.
> This pass would be in RISC-V's llvm port and it will be executed while code
> generation phase. This will be tested in any of the simulators mentioned in
> tagged memory tutorial.
>
> Please provide your valuable feedback on this.
>
> Sincerely,
> *Vivek Pandya*
>
> Hi Vivek,
I'm in a similar position as yours and I've started looking into it. I'd
like to be able to discuss it with someone else.
Sincerely,
Ivan Seminara
7 years, 6 months
Re : LLVM pass for control-flow hijacking protection using lowRISC’s tagged memory
by vivek pandya
Hello LOWRISC community,
I would like to implement this project. I am a CS graduate student and I
have little experience with writing LLVM optimization passes.
As per my understanding about this project , it requires to implement an
LLVM pass that will augment every code pointer with tags so that it is
interpreted as read only memory, also make loader(linux kernel for lowrisc)
to check while loading this code pointer that it is read only and
modification to this pointer would result in error.
This pass would be in RISC-V's llvm port and it will be executed while code
generation phase. This will be tested in any of the simulators mentioned in
tagged memory tutorial.
Please provide your valuable feedback on this.
Sincerely,
*Vivek Pandya*
7 years, 6 months
Choosing a de facto standard programmable interrupt controller
by Alex Bradbury
Thanks mostly to the hard work of Wei Song, we (lowRISC) are getting
very close to an 'untethered' RISC-V system
http://phab.lowrisc.org/T6. That is, a system running without a host
processor providing I/O via the host-target interface.
One of the missing parts of the story is the interrupt controller. My
personal view is that a well-thought out official RISC-V interrupt
controller spec should really be specified in conjunction with RISC-V
virtualisation support, paying particular attention to efficient
delivery of interrupts to virtualised guests and so on. This is a
significant piece of work which to my knowledge hasn't been started.
However, a number of us are hoping to produce usable systems capable
of running Linux, FreeBSD and similar OSes in the not too distant
future without a host CPU providing I/O via the host-target interface.
Without an agreed-upon interrupt controller, the various groups
working on RISC-V systems could waste a lot of effort inventing their
own and implementing the necessary OS support. For the sake of
clarity, I'm not talking about shipping commercial systems here - I'm
talking about test chips and research platforms/prototypes.
As part of their work, the BERI project
(https://www.cl.cam.ac.uk/research/security/ctsrd/beri/downloads-hw.html)
here at the lab defined a simple interrupt controller. See page 73 of
http://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-852.pdf for a
specification and
https://github.com/CTSRD-CHERI/cheribsd/blob/master/sys/mips/beri/beri_pic.c
for the FreeBSD driver implementation.
Right now, we have nothing approaching a standard PIC. I propose that
for the time being we (lowRISC and anybody else interested in
collaborating on shared software+hardware infrastructure) start with
the BERI PIC in order to quickly get to a working, usable system. I
suspect there's not much point in investing substantial effort in
defining a PIC that doesn't take into account virtualisation, which I
why I suggest for now we base work on something that already exists
until the virtualisation story is worked out in more detail. I would
of course be interested in hearing conflicting opinions.
Any thoughts?
Best,
Alex
7 years, 6 months